參數(shù)資料
型號: CDC857-3
廠商: Texas Instruments, Inc.
英文描述: 2.5-/3.3-V PHASE-LOCK LOOP CLOCK DRIVERS
中文描述: 2.5-/3.3-V鎖相環(huán)時鐘驅動器
文件頁數(shù): 4/12頁
文件大小: 157K
代理商: CDC857-3
CDC857-2, CDC857-3
2.5-/3.3-V PHASE-LOCK LOOP CLOCK DRIVERS
SCAS627A – SEPTEMBER 1999 – DECEMBER 1999
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range, V
CC
or AV
CC
Input voltage range V
I
(see Notes 1 and 2)
Output voltage range, V
O
, (see Notes 1 and 2)
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
Continuous total output current, I
O
(V
O
= 0 to V
CC
)
Package thermal impedance,
θ
JA
(see Note 3)
Storage temperature range T
stg
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
–0.5 V to 4.6 V
–0.5 V to V
CC
+0.5 V
–0.5 V to V
CC
+0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
50 mA
±
50 mA
±
50 mA
89
°
C/W
–65
°
C to 150
°
C
recommended operating conditions (see Note 4)
MIN
NOM
MAX
UNIT
Supply voltage, VCC
2.3
2.7
V
Analog supply voltage AVCC
Analog supply voltage, AVCC
CDC857–2
2.3
2.7
V
CDC857–3
3
3.6
V
Low–level input voltage, VIL(G)
High–level input voltage, VIH(G)
DC input signal voltage (see Note 5)
G input
0.3
×
VCC
V
G input
0.7
×
VCC
V
CLK, FBIN
–0.3
VCC+0.3
VCC+0.6
VCC+0.6
VCC/2+0.2
V
Differential input signal voltage, VID
(see Note 6)
dc
CLK, FBIN
0.35
V
g ,
ac
CLK, FBIN
0.7
V
Differential cross-point input voltage (see Note 7)
VCC/2–0.2
VCC/2
V
High-level output current, IOH
Low-level output current, IOL
Input slew rate, SR
–12
mA
12
mA
1
V/ns
°
C
Operating free-air temperature, TA
NOTES:
4. Unused inputs must be held high or low to prevent them from floating.
5. DC input signal voltage specifies the allowable dc execution of differential input.
6. Differential input signal voltage specifies the differential voltage |VTR – VCP| required for switching, where VTR is the true input level
and VCP is the complementary input level (see figure 3).
7. Differential cross-point voltage is expected to track variations of VCC and is the voltage at which the differential signals must be
crossing.
0
85
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