參數(shù)資料
型號： CD4510BKMSR
廠商： INTERSIL CORP
元件分類： 計數(shù)器
英文描述： 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL DECADE COUNTER, CDFP16
封裝： CERAMIC, DFP-16
文件頁數(shù)： 6/11頁
文件大?。?/td> 141K
代理商： CD4510BKMSR
4
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1, 2
+125oC
-
-1.15
mA
-55oC
-
-2.0
mA
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1, 2
+125oC
-
-0.9
mA
-55oC
-
-1.6
mA
Output Current (Source)
IOH15
VDD =15V, VOUT = 13.5V
1, 2
+125oC
-
-2.4
mA
-55oC
-
-4.2
mA
Input Voltage Low
VIL
VDD = 10V, VOH > 9V, VOL < 1V
1, 2
+25oC, +125oC, -
55oC
-3
V
Input Voltage High
VIH
VDD = 10V, VOH > 9V, VOL < 1V
1, 2
+25oC, +125oC, -
55oC
+7
-
V
Propagation Delay
Clock to Q Output
TPHL1
TPLH1
VDD = 10V
1, 2, 3
+25oC
-
200
ns
VDD = 15V
1, 2, 3
+25oC
-
150
ns
Propagation Delay
Preset or Reset to Q
TPHL2
TPLH2
VDD = 10V
1, 2, 3
+25oC
-
210
ns
VDD = 15V
1, 2, 3
+25oC
-
160
ns
Propagation Delay
Clock to Carry Out
TPHL3
TPLH3
VDD = 10V
1, 2, 3
+25oC
-
240
ns
VDD = 15V
1, 2, 3
+25oC
-
180
ns
Propagation Delay
Carry In to Carry Out
TPHL4
TPLH4
VDD = 10V
1, 2, 3
+25oC
-
120
ns
VDD = 15V
1, 2, 3
+25oC
-
100
ns
Propagation Delay Preset
or Reset to Carry Out
TPHL5
TPLH5
VDD = 10V
1, 2, 3, 4
+25oC
-
320
ns
VDD = 15V
1, 2, 3, 4
+25oC
-
250
ns
Transition Time
TTLH
TTHL
VDD = 10V
1, 2, 3
+25oC
-
100
ns
VDD = 15V
1, 2, 3
+25oC
-
80
ns
Maximum Clock Input Fre-
quency
FCL
VDD = 10V
1, 2
+25oC
4
-
MHz
VDD = 15V
1, 2
+25oC
5.5
-
MHz
Minimum Hold Time
Preset Enable to JN
TH
VDD = 5V
1, 2, 3
+25oC
-
70
ns
VDD = 10V
1, 2, 3
+25oC
-
40
ns
VDD = 15V
1, 2, 3
+25oC
-
40
ns
Minimum Data Setup Time
Preset Enable to JN
TS
VDD = 5V
1, 2, 3
+25oC
-
25
ns
VDD = 10V
1, 2, 3
+25oC
-
10
ns
VDD = 15V
1, 2, 3
+25oC
-
10
ns
Minimum Data Hold Time
Clock to Carry In
TH
VDD = 5V
1, 2, 3
+25oC
-
60
ns
VDD = 10V
1, 2, 3
+25oC
-
30
ns
VDD = 15V
1, 2, 3
+25oC
-
30
ns
Minimum Clock Hold Time
Clock to Up/Down
TH
VDD = 5V
1, 2, 3
+25oC
-
30
ns
VDD = 10V
1, 2, 3
+25oC
-
30
ns
VDD = 15V
1, 2, 3
+25oC
-
30
ns
Input Capacitance
CIN
Any Input
1, 2
+25oC
-
7.5
pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial
design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Reset to Carry Out (TPLH) only.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
UNITS
MIN
MAX
CD4510BMS, CD4516BMS
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