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FIGURE 2. LOGIC DIAGRAM FOR CD40161BMS AND CD40163BMS BINARY COUNTERS
Logic Diagrams
(Continued)
LD PI
T
CL
CLR
LD PI
T
CL
CLR
LD PI
T
CL
CLR
LD PI
T
CL
CLR
14
13
12
11
15
6
5
4
3
10
7
9
2
1
9
2
1
CD40161BMS
ASYNCHRONOUS
CLEAR
CLOCK
*
CLEAR
*
CD40163BMS
SYNCHRONOUS
CLEAR
*
INPUTS PROTECTED BY
CMOS PROTECTION NETWORK
LOAD
*
LOAD
*
CLOCK
*
CLEAR
*
PE
TE
P1
P2
P3
P4
*
*
*
*
*
*
Q1
Q1
Q1
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
COUT
CD40161BMS AND CD40163BMS BINARY COUNTERS
Q1
VDD
VSS
16
VDD
Q2
Q2
Q2
Q4
Q3
Q2
TRUTH TABLE
CLOCK
CLR
LOAD
PE
TE
OPERATION
1
0
X
X
Preset
1
1
0
X
NC
1
1
X
0
NC
1
1
1
1
Count
X
0
X
X
X
Reset (CD40160BMS, CD40161BMS)
0
X
X
X
Reset (CD40162BMS, CD40163BMS)
1
X
X
X
NC (CD40162BMS, CD40163BMS)
1 = High Level
0 = Low Level
X = Don’t Care
NC = No Change
CD40160BMS, CD40161BMS, CD40162BMS, CD40163BMS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CD40163BMS | Single 2-Input Positive-AND Gate 5-SC70 -40 to 85 |
| CD40161BMS | CMOS Synchronous Programmable 4-Bit Counters(CMOS 同步可編程4位計(jì)數(shù)器) |
| CD40160 | CMOS Synchronous Programmable 4-Bit Counters |
| CD40161 | Single Buffer/Driver With Open-Drain Output 5-SOT-23 -40 to 85 |
| CD40162 | CMOS Synchronous Programmable 4-Bit Counters |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CD40163B | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Decade Counter with Asynchronous Clear |
| CD40163BC | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Decade Counter with Asynchronous Clear |
| CD40163BCJ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Decade Counter with Asynchronous Clear |
| CD40163BCJ/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Synchronous Up Counter |
| CD40163BCN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Decade Counter with Asynchronous Clear |
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