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| 型號： | C9758 |
| 元件分類： | XO, clock |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封裝： | SO-28 |
| 文件頁數(shù)： | 1/1頁 |
| 文件大小： | 26K |
| 代理商： | C9758 |
C9758
I
2
C Clock Generator for 440BX chipset with Pentium
II and Pentium
III Systems
Advanced Information
IMI Confidential
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
http://www.imicorp.com
Rev. 1.6
8/13/1999
Page 1 of 13
Product Features
Supports Pentium
II and Pentium
III systems
Supports 440BX, VIA Pro133 and 133A chipsets
2 Low Skew CPU clocks
7 Low Skew PCI synchronous clocks
I
2
C 2-Wire serial interface for programmability
Programmable registers featuring:
- Jumper-less frequency selection
- enable/disable each output pin
- Selectable Spread spectrum bandwidth
Fixed 48 MHz for USB support,
Resistor Programmable 48/24Mhz for SIO
Internal crystal load capacitors
28-pin SOIC package
IMI Spread Spectrum Technology for EMI reduction
Block Diagram
Fig.1
Frequency Table
(MHz)
S2*
SEL100/66#
S1*
S0*
CPU
PCI
Ratio
1
0
0
0
126
31.5
1/4
1
0
0
1
135
33.75
1/4
1
0
1
0
137
34.25
1/4
1
0
1
1
138.5
34.62
1/4
1
1
0
0
142
35.5
1/4
1
1
0
1
144
36
1/4
1
1
1
0
155
38.75
1/4
1
1
1
1
133.3
33.3
1/4
0
0
0
0
78
39
1/2
0
0
0
1
81
40.5
1/2
0
0
1
0
113.6
37.8
1/3
0
0
1
1
66.8
33.4
1/2
0
1
0
0
117
39
1/3
0
1
0
1
118.5
39.5
1/3
0
1
1
0
122
40.6
1/3
0
1
1
1
100.2
33.4
1/3
Table1
Frequency table changes when Spread Spectrum is enabled, see
page 6 for SSON table.
* S2, S1 and S0 are programmable through I2C only.
Pin Configuration
XIN
XOUT
VSS
PCI_F
PCI1
PCI2
PCI3
PCI4
VDDP
PCI5
PCI6
VDD
48MHz
24/48 MHz
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VSS
REF/SEL48#
VDD
VDDI
IOAPIC
VDDC
CPU1
CPU0
VDD
VSS
SDATA
SCLK
SEL100/66#
VSS
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDDC
VDDP
VDDI
VDD
VDD
VDD
Sel48#
300K
2
7
32pF
32pF
PLL1
Rin
i2c-clk
i2c-data
apic
s100/66#
cpu
pci
1
1
X
PLL2
24
Rin
48
1
1
0
1
REF
XIN
XOUT
CPU(0:1)
PCI(_F,1:6)
IOAPIC
24/48MHz
48MHz
SDATA
SCLK
SEL100/66#
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