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參數(shù)資料
型號: C8051F300-TB
廠商: Silicon Laboratories Inc
文件頁數(shù): 86/178頁
文件大?。?/td> 0K
描述: BOARD PROTOTYPING W/C8051F300
標準包裝: 1
類型: MCU
適用于相關產(chǎn)品: C8051F300
所含物品:
DOCUMENT CHANGE LIST
Revision 2.3 to Revision 2.4
Removed preliminary tag.
Changed all references of MLP package to
QFN package.
Pinout chapter: Figure 4.3: Changed title to
“Typical QFN-11 Solder Paste Mask.”
ADC chapter: Added reference to minimum
tracking time in the Tracking Modes section.
Comparators chapter: SFR Definition 7.3,
CPT0MD: Updated the register reset value and
the CP0 response time table.
CIP51 chapter: Updated IDLE mode and rec-
ommendations.
CIP51 chapter: Updated Interrupt behavior and
EA recommendations.
CIP51 chapter: SFR Definition 8.4, PSW: Clari-
fied OV flag description.
CIP51 chapter: SFR Definition 8.8, IP register:
Changed “default priority order” to “l(fā)ow priority”
for low priority descriptions.
Reset Sources chapter: Clarified description of
VDD Ramp Time.
Reset Sources chapter: Table 9.2, “Reset Elec-
trical Characteristics”: Added VDD Ramp Time
and changed “VDD POR Threshold” to “VDD
Monitor Threshold.”
FLASH Memory chapter: Clarified descriptions
of FLASH security features.
Oscillators chapter: Table 11.1 “Internal Oscil-
lator Electrical Characteristics”: Added Cali-
brated Internal Oscillator specification over a
smaller temperature range.
Oscillators chapter: Clarified external crystal
initialization steps and added a specific
32.768 kHz crystal example.
Oscillators chapter: Clarified external capacitor
example.
SMBus chapter: Figure 14.5, SMB0CF regis-
ter: Added a description of the behavior of
Timer 3 in split mode if SMBTOE is set.
Timers chapter: Changed references to “TL2”
and “TH2” to “TMR2L” and “TMR2H,” respec-
tively.
Revision 2.4 to Revision 2.5
Fixed variables and applied formatting
changes.
Revision 2.5 to Revision 2.6
Updated Table 1.1 Product Selection Guide to
include Lead-free information.
Revision 2.6 to Revision 2.7
Removed non-RoHS compliant devices from
Added MIN and MAX specifications for ADC
Offset Error and ADC Full Scale Error to
Improved power supply specifications in
Fixed minor typographical errors throughout.
Revision 2.7 to Revision 2.8
Updated block diagram on page 1.
Revision 2.8 to Revision 2.9
Updated QFN package drawings and notes.
Added SOIC-14 package information.
Added text to CPT0CN's SFR definition to indi-
cate that the SFR is bit addressable.
Changed SMBus maximum transfer speed
from 1/10th system clock to 1/20th system
clock in SMBus section.
Added information pertaining to Slave
Receiver and Slave Transmitter states in Table
13.4.
Changed Table 5.1 and Figure 5.4 to indicate
that 11 SAR clocks are needed for a SAR con-
version to complete.
Changed SCON0s SFR definition to show that
SCON0 bit 6 always resets to a value of 1.
C8051F300/1/2/3/4/5
176
Rev. 2.9
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參數(shù)描述
C8051F300-TB-K 功能描述:BOARD PROTOTYPING W/C8051F300 制造商:silicon labs 系列:- 零件狀態(tài):在售 板類型:評估平臺 類型:MCU 8-位 核心處理器:8051 操作系統(tǒng):- 平臺:- 配套使用產(chǎn)品/相關產(chǎn)品:C8051F30x 安裝類型:固定 內容:板 標準包裝:1
C8051F301 功能描述:8位微控制器 -MCU 8KB 2%osc RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F301-GM 功能描述:8位微控制器 -MCU 8KB 11P MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F301-GMR 功能描述:8位微控制器 -MCU 8KB 11P MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F301-GS 功能描述:8位微控制器 -MCU 8KB Flash 2%osc RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT