參數(shù)資料
型號(hào): BUK543-100A
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: PowerMOS transistor Logic level FET
中文描述: 8.3 A, 100 V, 0.18 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
封裝: PLASTIC, FULL PACK-3
文件頁(yè)數(shù): 1/8頁(yè)
文件大?。?/td> 58K
代理商: BUK543-100A
Philips Semiconductors
Product Specification
PowerMOS transistor
Logic level FET
BUK543-100A/B
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode
logic level field-effect power
transistor in a plastic full-pack
envelope.
The device is intended for use in
Switched Mode Power Supplies
(SMPS), motor control, welding,
DC/DC and AC/DC converters, and
in automotive and general purpose
switching applications.
SYMBOL
PARAMETER
MAX.
MAX.
UNIT
BUK543
-100A
100
8.3
25
0.18
-100B
100
7.5
25
0.22
V
DS
I
D
P
tot
R
DS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Drain-source on-state
resistance;
V
A
W
V
GS
= 5 V
PINNING - SOT186
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
case isolated
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
V
DS
Drain-source voltage
V
DGR
Drain-gate voltage
±
V
GS
Gate-source voltage
±
V
GSM
Non-repetitive gate-source voltage t
p
50
μ
s
CONDITIONS
-
R
GS
= 20 k
-
MIN.
-
-
-
-
MAX.
100
100
15
20
UNIT
V
V
V
V
-100A
8.3
5.2
33
-100B
7.5
4.7
30
I
D
I
D
I
DM
P
tot
T
stg
T
j
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction Temperature
T
hs
= 25 C
T
hs
= 100 C
T
hs
= 25 C
T
hs
= 25 C
-
-
-
-
-
-
A
A
A
W
C
C
25
150
150
- 55
-
THERMAL RESISTANCES
SYMBOL
R
th j-hs
PARAMETER
Thermal resistance junction to
heatsink
Thermal resistance junction to
ambient
CONDITIONS
with heatsink compound
MIN.
-
TYP.
-
MAX.
5.0
UNIT
K/W
R
th j-a
-
55
-
K/W
1 2 3
case
d
g
s
April 1993
1
Rev 1.100
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