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參數(shù)資料
| 型號： | BU21023MUV-E2 |
| 廠商： | Rohm Semiconductor |
| 文件頁數(shù)： | 19/22頁 |
| 文件大小： | 0K |
| 描述： | IC CTLR TOUCH PANEL 28VQFN |
| 特色產(chǎn)品： | Resistive Touchscreen Controller Ics |
| 標準包裝： | 1 |
| 類型： | 電阻 |
| 觸摸面板接口： | 4，2 線 |
| 輸入數(shù)/鍵： | 1 TSC |
| 分辨率（位）： | 8 b |
| 評估套件： | * |
| 數(shù)據(jù)接口： | I²C，串行，SPI? |
| 電源電壓： | 1.8V，3V |
| 電流 - 電源： | 4mA |
| 工作溫度： | -20°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 28-QFN |
| 包裝： | 標準包裝 |
| 其它名稱： | BU21023MUV-E2DKR |
6
COMMERCIALTEMPERATURERANGE
IDT72V70810 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 1,024 x 1,024
The data in the IMS register consists of block programming bits (BPD0-
BPD4),blockprogrammingenablebit(BPE),outputstandbybit(OSB)andstart
frameevaluationbit(SFE).Theblockprogrammingandtheblockprogramming
enablebitsallowsuserstoprogramtheentireconnectionmemory(seeMemory
BlockProgrammingsection).IftheODEpinislow,theOSBbitenables(ifhigh)
ordisables(iflow)allST-BUSoutputdrivers.IftheODEpinishigh,thecontents
of the OSB bit is ignored and all TX output drivers are enabled.
CONNECTION MEMORY CONTROL
TheCCOpinisa16.384Mb/soutput,whichcarries2,048bits.Thecontents
of the CCO bit of each connection memory location are output on the CCO pin
once every frame. The contents of the CCO bits of the connection memory are
transmitted sequentially on to the CCO pin (2 bit cells for each bit in connection
memory) and are synchronous with the data rates on the other serial streams.
The CCO bit is output one channel before the corresponding channel on the
serialstreams.
If the ODE pin or the OSB bit is high, the OE bit of each connection memory
location controls the output drivers-enables (if high) or disables (if low). See
Table 4 for detail.
Theprocessorchannel(PC)bitoftheconnectionmemoryselectsbetween
Processor Mode and Connection Mode. If high, the contents of the connection
memoryareoutputontheTXstreams. Iflow,thestreamaddressbit(SAB)and
the channel address bit (CAB) of the connection memory defines the source
information(streamandchannel)ofthetime-slotthatwillbeswitchedtotheoutput
from data memory.
The
V/C(Variable/ConstantDelay)bitineachconnectionmemorylocation
allows the per-channel selection between variable and constant throughput
delay modes.
If the LPBK bit is high, the associated TX output channel data is internally
looped back to the RX input channel (i.e., RX n channel m data comes from the
TX n channel m). If the LPBK bit is low, the loopback feature is disabled. For
proper per-channel loopback operation, the contents of the frame delay offset
registers must be set to zero.
INITIALIZATION OF THE IDT72V70810
After power up, the state of the connection memory is unknown. As such,
theoutputsshouldbeputinhighimpedancebyholdingtheODElow. Whilethe
ODE is low, the microprocessor can initialize the device, program the active
paths, and disable unused outputs by programming the OE bit in connection
memory. Once the device is configured, the ODE pin (or OSB bit depending
on initialization) can be switched.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| BU21023MUV-ME2 | 制造商:ROHM 制造商全稱:Rohm 功能描述:Resistive Type Touch Screen Controller ICs |
| BU21024FV-M | 制造商:ROHM 制造商全稱:Rohm 功能描述:Resistive Type Touch Screen Controller ICs |
| BU21024FV-ME2 | 制造商:ROHM 制造商全稱:Rohm 功能描述:Resistive Type Touch Screen Controller ICs |
| BU21024FV-M-E2 | 制造商:ROHM Semiconductor 功能描述: |
| BU21024GUL-ME2 | 制造商:ROHM 制造商全稱:Rohm 功能描述:Resistive Type Touch Screen Controller ICs |
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