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參數(shù)資料
| 型號： | BU-65570V1-300 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, XMA |
| 封裝： | 6.3 INCH HEIGHT, VME/VXI FORMAT CARD |
| 文件頁數(shù)： | 7/9頁 |
| 文件大?。?/td> | 151K |
| 代理商： | BU-65570V1-300 |
7
Data Device Corporation
www.ddc-web.com
BU-65570V/65572V
F-04/05-0
RT INTERRUPT GENERATION
RT interrupts may be enabled by a global interrupt mask for
transmit/receive messages with no message error, mode com-
mands with no message error, transmit/receive messages with
the message error bit set, or mode commands with the message
error bit set.
RT interrupts are issued by intermessage routines associated
with data tables allowing for selective interrupt generation on a
message by message basis. A two-word vector is pushed onto a
circular queue for each interrupt and is transparent to the user.
The queue can hold up to 64 interrupt vectors; thus, the host
computer is not required to immediately acknowledge the inter-
rupt request.
MONITOR INTERRUPTS
Monitor interrupts may be generated after each message is
received or after one third of the monitor's circular buffer has
been filled (approximately 4K words). This allows for either real-
time analysis or mass collection/storage of monitored data.
OTHER FEATURES
VARIABLE AMPLITUDE TRANSCEIVER
The BU-65572V provides variable amplitude transceivers for
each 1553 channel installed on the card. The output of the vari-
able transceiver is software controllable in the range of 0 volts
to 21.5 volts. This range is covered in 1024 steps. The user
application is able to modify this amplitude in realtime by calling
the appropriate library function.
The transceiver outputs can be individually controlled for each of
the installed channels, while the two transceivers for a given
channel will be varied simultaneously. Functions for controlling
the transceiver outputs are added to the 'C' library that is provid-
ed with the card.
IRIG-B SUPPORT
Inter-Range Instrument Group (IRIG) Standard 200-95 is provid-
ed in the BU-65570V/72V boards. The implementation of this
standard into the 1553 tester/simulator board enables all mes-
sages to be tagged with time-of-day information, allowing accu-
rate correlation between messaging on the 1553 bus and other
hardware and software events that are occurring in the system.
This is especially useful when trying to identify the cause of a
system problem that may be directly related to message data
sent over the 1553 bus. The IRIG-B timestamp for each of the
installed channels may be individually selected. This allows one
channel to use the internal 32 bit Time-Tag clock, while another
channel will stamp the messages with the IRIG-B time. The
IRIG-B timestamp, if enabled, will be combined with the internal
timestamp to provide μsec accuracy.
MONITOR DMA TO HOST BUFFER
The BU-65570V/72V is fully compliant to the PCI standards for
both Target and Master applications. As a PCI master, the BU-
65570V/72V is capable of performing DMA block data transfers
from the monitor buffers on the card to a user buffer in the host
memory. This will allow the transfer of data without interrupting
the host processor, enabling it to perform other more important
tasks.
VXI PLUG AND PLAY
VXI Plug and Play is provided on the BU-65570V/72V with the
signal MODID enabled on J2. When the jumper is in place to
enable this signal, the system will query the card for information
contained in the VXI registers of the card. These registers con-
tain information such as Manufacturer ID, Card Address Space
(A24 or A32), Required Memory, and Interrupt Vector Number.
The manufacturer programs the card and manufacturer informa-
tion, while a jumper on the card sets the Address Space.
SOFTWARE CONTROL OF BUS CONFIGURATION
The BU-65570V/65572V has the capability of being connected
to the bus as either Transformer Coupled or Direct Coupled.
Transformer coupling enables the card to be connected to the
1553 bus with a long stub of up to 20 feet. Direct coupling
requires that the card be connected to the 1553 bus by a stub of
no more than 1 foot. The coupling configuration is dynamically
configurable via functions provided in the 'C' library. Relays on
the board are used to select the correct signal path direct or
transformer coupled for each of the installed channels.
This card also has the capability of modifying the bus termination
to one of three different loads. If the bus termination is set to
None, then the effective impedance is infinite ohms. If the bus is
set to Full, then the bus termination will be 37.5 ohms. A setting
of Half will cause a bus termination of 75.0 ohms. This control
makes it quite simple to connect the 65570V/72V directly to
another 1553 device without the need of an external load. As
with the bus coupling mode, the bus termination mode is dynam-
ically configurable via software functions provided in the 'C'
library which control relays for each installed channel.
DISCRETE OUTPUTS
This new Tester/Simulator design will include four discrete out-
puts per channel. These four outputs are set to logic '1' and
cleared to logic '0' by use of eight new intermessage routines.
The format of the routine names is SET_DISCRETE_X and
RESET_DISCRETE_X. These discrete outputs may be used for
signaling external equipment when a specific event or message
has occurred. The intermessage routine can be attached to any
message, data table, or frame symbol providing a wide variety of
debug possibilities.
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