AN1002
Application Notes
http://www.teccor.com
+1 972-580-7777
AN1002 - 4
2002 Teccor Electronics
Thyristor Product Catalog
Figure AN1002.8
“Amplified Gate” Thyristor Circuit
The following table and Figure AN1002.9 show the relationship of
gating, latching, and holding of a 4 A device.
Figure AN1002.9
Typical Gating, Latching, and Holding Relationships of 4 A Triac at 25 °C
The relationships of gating, latching, and holding for several
device types are shown in the following table. For convenience
all ratios are referenced to Quadrant I gating.
A
K
A
K
G
G
Sensitive
SCR
Power
SCR
MT2
G
G
Sensitive
Triac
Power
Triac
*
*
Resistor is provided for limiting gate
current (I
GTM
) peaks to power device.
*
MT2
MT1
MT1
Typical 4 A Triac Gating, Latching,
and Holding Relationship
Quadrants or Operating Mode
Quadrant I
Quadrant II
10
17
Parameter
I
GT
(mA)
I
L
(mA)
I
H
(mA)
Quadrant III
18
Quadrant IV
27
12
48
12
13
10
10
12
12
50
40
30
20
10
0
10
20
30
40
(mA)
20
10
20
10
QUADRANT II
QUADRANT III
(mA)
QUADRANT I
QUADRANT IV
I
GT
(Solid Line)
I
L
(Dotted Line)
I
H
(+)
I
H
(–)
Typical Ratio of Gating, Latching, and Holding Currents at 25 °C
Devices
4 A Triac
10 A Triac
15 A Alternistor
1 A Sensitive SCR
6 A SCR
Ratio
1.6
2.5
2.7
1.2
4.8
1.2
1.3
1.0
1.2
1.5
1.4
3.1
1.6
4.0
1.8
2.0
1.1
1.6
1.5
1.8
–
2.4
7.0
2.1
–
2.2
1.9
–
–
–
25
–
–
–
25
–
–
–
–
3.2
–
–
–
2.6
–
I
II
GT
I
( )
( )
-I
I
III
GT
I
( )
(
)
--I
I
IV
GT
I
( )
(
)
--I
I
I
( )
GT
I
( )
I
I
II
GT
I
( )
( )
I
I
III
GT
I
( )
(
)
I
I
IV
GT
I
( )
(
)
I
I
+
GT
I
( )
( )
I
I
(-)
GT
I
( )
I