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參數(shù)資料
| 型號： | BD4PUODF5FSCLS33 |
| 英文描述： | Triac; Triac Type:Standard; Peak Repetitive Off-State Voltage, Vdrm:400V; On-State RMS Current, IT(rms):6A; Gate Trigger Current (QI), Igt:25mA; Package/Case:3-TO-202; Current, It av:6A; Holding Current:50mA |
| 中文描述： | 緩沖器/驅(qū)動器 |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 135K |
| 代理商： | BD4PUODF5FSCLS33 |
G12-p 3.3 V, 4 mA, 5-Volt Tolerant, Fail-Safe, General Purpose I/O Buffers
11
System Design Guidelines
To ensure good system-level operation, LSI Logic provides the following
guidelines for placing these I/O cells in the ASIC and for supplying power.
Placement
All these I/O cells have the same dimensions (
Table 12
) and require
placement on the I/O ring using one I/O slot.
For correct placement of the I/O cells, adhere to the following guidelines:
These I/O cells may adjoin each other. They may also adjoin a
bd4f5fs60ls33
cell.
Separate these I/O cells from any other type of I/O function by at
least one I/O slot to avoid N-channel to P-channel design rule
violations. If possible, use a VDD or VSS pad for the separation.
Because their lengths exceed the length of other standard I/O
functions, these I/O cells may not use a corner I/O slot.
Power
For best system-level performance, adhere to the following power
guidelines:
Use one power/ground pad pair for every four I/O cells.
Place an I/O cell no more than four slots away from a power pad and
no more than four slots away from a ground pad.
Table 12
Cell Dimensions on the I/O Ring
Width Along the I/O Ring
Length into the Chip
45.36
μ
m
397.53
μ
m
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BD5.1/0.8/10-4S2 | 制造商:Yageo / Ferroxcube 功能描述: |
| BD5.1/1.5/4-3S1 | 制造商:Ferroxcube 功能描述:Bulk |
| BD5.1/1.5/4-4S2 | 制造商:Yageo / Ferroxcube 功能描述: |
| BD5.1/2/10-3S1 | 制造商:Ferroxcube 功能描述:Bulk |
| BD5.1/2/10-4S2 | 制造商:Yageo / Ferroxcube 功能描述: |
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