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參數(shù)資料
| 型號(hào)： | AU2901 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Quad voltage comparator |
| 中文描述： | 四電壓比較器 |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大小： | 103K |
| 代理商： | AU2901 |
Philips Semiconductors
Product data
AU2901
Quad voltage comparator
2001 Aug 03
4
ELECTRICAL CHARACTERISTICS
V+ = 5 V
DC;
–40
°
C
≤
T
amb
≤
125
°
C, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
Limits
UNIT
Min
Typ
Max
V
OS
Input offset voltage
2
In ut offset voltage
T
amb
= 25
°
C
Over temp.
±
2.0
±
2.5
±
3
±
5
mV
V
CM
Input common-mode voltage range
3
In ut common-mode voltage range
T
amb
= 25
°
C
Over temp.
0
0
V+ –1.5
V+ –2.0
V
V
IDR
Differential input voltage
1
Keep all V
INs
≥
0V
DC
(or V– if need)
I
IN(+)
or I
IN(–)
with output in linear range
T
amb
= 25
°
C
Over temp.
V+
V
I
BIAS
Input bias current
4
25
200
250
500
nA
I
IN(+)
– I
IN(–)
T
amb
= 25
°
C
Over temp.
I
OS
Input offset current
±
5
±
50
±
50
±
200
nA
nA
I
OL
Output sink current
V
IN(–)
≥
1 V
DC
; V
IN
(+) = 0; V
O
≤
1.5 V
DC
;
T
amb
= 25
°
C
V
IN(+)
≥
1 V
DC
; V
IN
(–) = 0
V
O
= 5 V
DC
; T
amb
= 25
°
C
V
O
= 30 V
DC
; Over temp.
R
L
=
∞
on comparators,
T
amb
= 25
°
C
V+ = 30 V
6.0
16
mA
I
OH
Output leakage current
0.1
nA
μ
A
1.0
I
CC
Supply current
0.8
1.0
2.0
2.5
mA
A
V
Voltage gain
R
L
≥
15 k
; V+ = 15 V
DC
V
IN(–)
≥
1 V
DC
; V
IN(+)
= 0; I
SINK
≤
4 mA
T
amb
= 25
°
C
Over temp.
25
100
V/mV
V
OL
Saturation voltage
400
700
mV
400
t
LSR
Large signal response time
Large–signal response time
V
IN
= TTL logic swing; V
= 1.4V
;
V
RL
= 5V
DC
; R
L
= 5.1 k
; T
amb
= 25
°
C
300
ns
REF
DC
t
R
Response time
5
V
RL
= 5 V
DC
; R
L
= 5.1 k
; T
amb
= 25
°
C
1.3
μ
s
NOTES:
1. Positive excursions of input voltage may exceed the power supply level by 17 V. As long as the other voltage remains within the
common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than –0.3 V
DC
(or
0.3 V
DC
below the magnitude of the negative power supply, if used).
2. At output switch point, V
O
≈
1.4 V
DC
, R
S
= 0
with V+ from 5 V
DC
to 30 V
DC
; and over the full input common-mode range (0 V
DC
to
V+ – 1.5 V
DC
).
3. The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common-mode voltage range is V+ – 1.5 V, but either or both inputs can go to 30 V
DC
without damage.
4. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of
the output so no loading change exists on the reference or input lines.
5. The response time specified is for a 100 mV input step with a 5 mV overdrive. For larger overdrive signals, 300 ns can be obtained (see
Typical Performance Characteristics section).
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