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    參數資料
    型號: ATTINY24A-SSUR
    廠商: Atmel
    文件頁數: 44/135頁
    文件大?。?/td> 0K
    描述: MCU AVR 2KB FLASH 20MHZ 14SOIC
    產品培訓模塊: MCU Product Line Introduction
    tinyAVR Introduction
    標準包裝: 1
    系列: AVR® ATtiny
    核心處理器: AVR
    芯體尺寸: 8-位
    速度: 20MHz
    連通性: USI
    外圍設備: 欠壓檢測/復位,POR,PWM,溫度傳感器,WDT
    輸入/輸出數: 12
    程序存儲器容量: 2KB(1K x 16)
    程序存儲器類型: 閃存
    EEPROM 大?。?/td> 128 x 8
    RAM 容量: 128 x 8
    電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
    數據轉換器: A/D 8x10b
    振蕩器型: 內部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
    包裝: 標準包裝
    其它名稱: ATTINY24A-SSURDKR
    15
    8183F–AVR–06/12
    ATtiny24A/44A/84A
    5.
    Memories
    This section describes the different memories in the ATtiny24A/44A/84A. The AVR architecture
    has two main memory spaces, the Data memory and the Program memory space. In addition,
    the ATtiny24A/44A/84A features an EEPROM Memory for data storage. All three memory
    spaces are linear and regular.
    5.1
    In-System Re-programmable Flash Program Memory
    The ATtiny24A/44A/84A contains 2K/4K/8K byte On-chip In-System Reprogrammable Flash
    memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-
    nized as 1024/2048/4096 x 16.
    The F lash memory has an endurance of at least 10,000 write/erase cycles. The
    ATtiny24A/44A/84A Program Counter (PC) is 10/11/12 bits wide, thus addressing the
    1024/2048/4096 Program memory locations. “Memory Programming” on page 158 contains a
    detailed description on Flash data serial downloading using the SPI pins.
    Constant tables can be allocated within the entire Program memory address space (see instruc-
    tions LPM – Load Program Memory and SPM – Store Program Memory).
    Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-
    Figure 5-1.
    Program Memory Map
    5.2
    SRAM Data Memory
    Figure 5-2 on page 16 shows how the ATtiny24A/44A/84A SRAM Memory is organized.
    The lower data memory locations address both the Register File, the I/O memory and the inter-
    nal data SRAM. The first 32 locations address the Register File, the next 64 locations the
    standard I/O memory, and the last 128/256/512 locations address the internal data SRAM.
    The five different addressing modes for the Data memory cover: Direct, Indirect with Displace-
    ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
    File, registers R26 to R31 feature the indirect addressing pointer registers.
    The direct addressing reaches the entire data space.
    The Indirect with Displacement mode reaches 63 address locations from the base address given
    by the Y- or Z-register.
    0x0000
    0x03FF/0x07FF/0x0FFF
    Program Memory
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