參數(shù)資料
型號: ATTINY15L-1PU
廠商: Atmel
文件頁數(shù): 32/85頁
文件大?。?/td> 0K
描述: IC MCU AVR 1K FLASH 1.6MHZ 8-DIP
標(biāo)準(zhǔn)包裝: 50
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 1.6MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 6
程序存儲器容量: 1KB(512 x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-DIP(0.300",7.62mm)
包裝: 管件
38
ATtiny15L
1187H–AVR–09/07
The user should poll the EEWE bit before starting the read operation. If a write operation
is in progress when new data or address is written to the EEPROM I/O Registers, the
write operation will be interrupted and the result is undefined.
The calibrated oscillator is used to time EEPROM. In Table 16 the typical programming
time is listed for EEPROM access from the CPU.
Preventing EEPROM
Corruption
During periods of low V
CC, the EEPROM data can be corrupted because the supply volt-
age is too low for the CPU and the EEPROM to operate properly. These issues are the
same as for board-level systems using the EEPROM and the same design solutions
should be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too
low. First, a regular write sequence to the EEPROM requires a minimum voltage to
operate correctly. Second, the CPU itself can execute instructions incorrectly if the sup-
ply voltage for executing instructions is too low.
EEPROM data corruption can easily be avoided by following these design recommen-
dations (one is sufficient):
1.
Keep the AVR RESET active (low) during periods of insufficient power supply
voltage. This can be done by enabling the internal Brown-out Detector (BOD) if
the operating voltage matches the detection level. If not, an external low V
CC
Reset Protection circuit can be applied.
2.
Keep the AVR core in Power-down sleep mode during periods of low V
CC. This
will prevent the CPU from attempting to decode and execute instructions, effec-
tively protecting the EEPROM Registers from unintentional writes.
3.
Store constants in Flash memory if the ability to change memory contents from
software is not required. Flash memory cannot be updated by the CPU and will
not be subject to corruption.
Table 16. Typical EEPROM Programming Times
Parameter
Number of Calibrated RC
Oscillator Cycles
Min Programming
Time
Max Programming
Time
EEPROM write
(from CPU)
8192
4.6 ms
8.2 ms
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