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參數(shù)資料
| 型號： | ATS636LSETN-T |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | RESISTOR, FIXED, FILM, CHIP |
| 中文描述： | 可編程回到偏霍爾效應的聚烯烴功能開關(guān) |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 814K |
| 代理商： | ATS636LSETN-T |
ATS635LSE and ATS636LSE
PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES
Lock-Bit Programming.
After the desired code is programmed, the lock bit (code 128), can be programmed (figure 7) to
prevent further programming of the device. Again; programming is not reversible.
Figure 7 – Lock-Bit Programming Pulse Sequence
See Allegro website at
http://www.allegromicro.com
for extensive information on device programming as well as
programming products. Programming hardware is available for purchase and programming software is available for free.
Valid over operating temperature range unless otherwise noted
.
Page 9 of 15
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright 200
5
Allegro MicroSystems, Inc.
Limits
Part Number
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Units
PROGRAMMING PROTOCOL (T
A
= +25°C)
V
PL
Minimum voltage range
during programming
4.5
5
5.5
V
V
PH
8.5
–
15
V
5,6
Programming Voltage
V
PP
Maximum supply current
during programming
OFF time between bits
Enable, address, program,
or lock bit ON time
Program pulse ON time
25
–
27
V
Programming Current
I
PP
–
500
–
mA
t
d(0)
20
–
–
μs
t
d(1)
20
–
–
μs
Pulsewidth
t
dP
100
300
–
μs
Pulse Rise Time
t
r
V
PL
to V
PH
or V
PP
–
–
11
μs
ATS635 /
ATS636
Pulse Fall Time
t
f
V
PH
or V
PP
to V
PL
–
–
5
μs
5
Programming Voltages are measured at Pin 1 (V
CC
) of SIP. A minimum capacitance of 0.1 μF must be connected from V
CC
to GND
of the SIP to provide the current necessary to blow the fuse.
6
Testing is the only method that guarantees successful programming.
V
PH
V
PL
V
PP
Program Enable
0
t
d(1)
t
d(1)
t
d(0)
t
dP
Lock Bit
Address
128 Pulses
L
P
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