參數(shù)資料
型號(hào): ATS625LSGTN-T
廠商: Allegro Microsystems Inc
文件頁(yè)數(shù): 12/22頁(yè)
文件大小: 892K
描述: IC SENSOR GEAR TOOTH 4-SIP
產(chǎn)品培訓(xùn)模塊: Current Sensor
標(biāo)準(zhǔn)包裝: 800
傳感范圍: 60% 跳閘,40% 釋放
類型: 專用型
電源電壓: 4 V ~ 24 V
電流 - 電源: 14mA
電流 - 輸出(最大): 10mA
輸出類型: 數(shù)字,開(kāi)路集電極
特點(diǎn): 輪齒類型
工作溫度: -40°C ~ 150°C
封裝/外殼: 4-SIP
供應(yīng)商設(shè)備封裝: 4-SIP
包裝: 帶卷 (TR)
True Zero-Speed Low-Jitter High Accuracy
Gear Tooth Sensor IC
ATS625LSG
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Undervoltage Lockout
When the supply voltage falls below the undervoltage lockout
level, V
CCUV
, the device switches to the OFF state. The device
remains in that state until the voltage level is restored to to the
V
CC
 operating range. Changes in the target magnetic profile
have no effect until voltage is restored. This prevents false sig-
nals caused by undervoltage conditions from propagating to the
output of the IC.
Power Supply Protection
The device contains an on-chip regulator and can operate over
a wide range of supply voltage levels. For applications using an
unregulated power supply, transient protection must be added
externally. For applications using a regulated supply line, EMI
and RFI protection may still be required. The circuit shown in
figure 5 is the basic configuration required for proper device
operation. Contact Allegro field applications engineering for
information on the circuitry required for compliance to various
EMC specifications.
Internal Electronics
The ATS625LSG contains a self-calibrating Hall effect IC
that possesses two Hall elements, a temperature compensated
amplifier and offset cancellation circuitry. The IC also contains
a voltage regulator that provides supply noise rejection over the
operating voltage range. The Hall transducers and the electron-
ics are integrated on the same silicon substrate by a proprietary
BiCMOS process. Changes in temperature do not greatly affect
this device due to the stable amplifier design and the offset rejec-
tion circuitry.
4
VCC
V
S
Output
GND
VOUT
AUX
C
BYPASS
0.1 糉
R
PU
ATS625
1
2
3
Figure 5. Power Supply Protection Typical Circuit
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