![](http://datasheet.mmic.net.cn/Atmel/ATMEGA88P-20AUR_datasheet_96576/ATMEGA88P-20AUR_236.png)
PIC16LF1904/6/7
DS41569A-page 236
Preliminary
2011 Microchip Technology Inc.
SWAPF
Swap Nibbles in f
Syntax:
[ label ]
SWAPF f,d
Operands:
0
f 127
d
[0,1]
Operation:
(f<3:0>)
(destination<7:4>),
(f<7:4>)
(destination<3:0>)
Status Affected:
None
Description:
The upper and lower nibbles of regis-
ter ‘f’ are exchanged. If ‘d’ is ‘0’, the
result is placed in the W register. If ‘d’
is ‘1’, the result is placed in register ‘f’.
TRIS
Load TRIS Register with W
Syntax:
[ label ] TRIS f
Operands:
5
f 7
Operation:
(W)
TRIS register ‘f’
Status Affected:
None
Description:
Move data from W register to TRIS
register.
When ‘f’ = 5, TRISA is loaded.
When ‘f’ = 6, TRISB is loaded.
When ‘f’ = 7, TRISC is loaded.
XORLW
Exclusive OR literal with W
Syntax:
[ label ]XORLW k
Operands:
0
k 255
Operation:
(W) .XOR. k
W)
Status Affected:
Z
Description:
The contents of the W register are
XOR’ed with the eight-bit
literal ‘k’. The result is placed in the
W register.
XORWF
Exclusive OR W with f
Syntax:
[ label ]
XORWF f,d
Operands:
0
f 127
d
[0,1]
Operation:
(W) .XOR. (f)
destination)
Status Affected:
Z
Description:
Exclusive OR the contents of the W
register with register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W register. If ‘d’
is ‘1’, the result is stored back in regis-
ter ‘f’.