參數(shù)資料
型號(hào): ATMEGA3250V-8AI
廠商: Atmel
文件頁(yè)數(shù): 13/29頁(yè)
文件大?。?/td> 0K
描述: IC AVR MCU 32K 8MHZ 100TQFP
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 90
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: SPI,UART/USART,USI
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 69
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
包裝: 托盤
配用: ATSTK600-TQFP100-ND - STK600 SOCKET/ADAPTER 100-TQFP
ATSTK504-ND - STARTER KIT AVR EXP MOD 100P LCD
PCA9698
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 3 August 2010
20 of 48
NXP Semiconductors
PCA9698
40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT
7.12 Output enable input (OE)
The configurable active LOW or active HIGH output enable pin allows to enable or disable
all the I/Os at the same time.
When a LOW level is applied to the OE pin, with OEPOL = 0 (register 2Ah, bit 4) or a
HIGH level is applied to the OE pin, with OEPOL = 1 (register 2Ah, bit 0), all the I/Os
configured as outputs are enabled and the logic value programmed in their respective
OP registers is applied to the pins.
When a HIGH level is applied to the OE pin, with OEPOL = 0 (register 2Ah, bit 0) or a
LOW level is applied to the OE pin, with OEPOL = 1 (register 2Ah, bit 0), all the I/Os
configured as outputs are 3-stated.
For applications requiring LED blinking with brightness control, this pin can be used to
control the brightness by applying a high frequency PWM signal on the OE pin. LEDs can
be blinked using the Output Port registers and can be dimmed using the PWM signal on
the OE pin thus controlling the brightness by adjusting the duty cycle.
Default is OEPOL = 0, so if the OE pin is held HIGH, the outputs are disabled. The OE pin
needs to be pulled LOW or OEPOL changed to ‘1’ to enable the outputs.
It is recommended to define the required polarity of the OE input by programing the value
of OEPOL before programming the configuration registers (IOC register).
7.13 Live insertion
The PCA9698 is fully specified for live-insertion applications using IOFF, power-up
3-states, robust state machine, and 50 ns noise filter. The IOFF circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered
down. The power-up 3-states circuitry places the outputs in the high-impedance state
during power-up and power-down, which prevents driver conflict and bus contention.
The robust state machine does not respond until it sees a valid START condition and the
50 ns noise filter will filter out any insertion glitches. The PCA9698 will not cause
corruption of active data on the bus nor will the device be damaged or cause damage to
devices already on the bus when similar featured devices are being used.
7.14 Standby
The PCA9698 goes into standby when the I2C-bus is idle. Standby supply current is lower
than 1.0
μA (typical).
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