參數(shù)資料
型號: ATF2500C-20PI
廠商: Atmel
文件頁數(shù): 22/24頁
文件大?。?/td> 0K
描述: IC CPLD EE 20NS 40DIP
標準包裝: 10
系列: ATF2500C(L)
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 20.0ns
電壓電源 - 內(nèi)部: 4.5 V ~ 5.5 V
宏單元數(shù): 24
輸入/輸出數(shù): 24
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 40-DIP(0.600",15.24mm)
供應商設備封裝: 40-PDIP
包裝: 管件
7
0777K–PLD–1/24/08
ATF2500C
7.
Security Fuse Usage
A single fuse is provided to prevent unauthorized copying of ATF2500C fuse patterns. Once pro-
grammed, the outputs will read programmed during verify.
The security fuse should be programmed last, as its effect is immediate.
The security fuse also inhibits Preload and Q2 observability.
8.
Bus-friendly Pin-keeper Input and I/O
All ATF2500C family members have programmable internal input and I/O pin-keeper circuits.
The default condition, including when using the AT2500C/CQ family to replace the AT2500B/BQ
or AT2500H, is that the pin-keepers are not activated.
When pin-keepers are active, inputs or I/Os not being driven externally will maintain their last
driven state. This ensures that all logic array inputs and device outputs are known states. Pin-
keepers are relatively weak active circuits that can be easily overridden by TTL-compatible driv-
ers (see input and I/O diagrams below).
Enabling or disabling of the pin-keeper circuits is controlled by the device type chosen in the
logic compiler device selection menu. Please refer to the Software Compiler Mode Selection
table for more details. Once the pin-keeper circuits are disabled, normal termination procedures
required for unused inputs and I/Os.
Figure 8-1.
Input Diagram
PROGRAMMABLE
OPTION
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