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參數(shù)資料
| 型號： | ATF22V10BQ-15SI |
| 廠商： | Atmel |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLD EE 15NS QTR PWR 24-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | 22V10 |
| 可編程類型： | EE PLD |
| 宏單元數(shù)： | 10 |
| 輸入電壓： | 5V |
| 速度： | 15ns |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 管件 |
| 其它名稱： | Q1324095 |
6
0250M–PLD–7/10
Atmel ATF22V10B
10.
Preload of Registered Outputs
The Atmel ATF22V10B registers are provided with circuitry to allow loading of each register with either a high or a
low. This feature will simplify testing since any state can be forced into the registers to control test sequencing. A
JEDEC file with preload is generated when a source file with vectors is compiled. Once downloaded, the JEDEC
file preload sequence will be done automatically by most of the approved programmers after the programming.
Figure 10-1.
Table 10-1.
11.
Security Fuse Usage
A single fuse is provided to prevent unauthorized copying of the ATF22V10B fuse patterns. Once programmed,
fuse verify and preload are inhibited. However, the 64-bit User Signature remains accessible.
The security fuse should be programmed last, as its effect is immediate.
12.
Electronic Signature Word
There are 64-bits of programmable memory that are always available to the user, even if the device is secured.
These bits can be used for user-specific data.
13.
Programming/Erasing
Programming/erasing is performed using standard PLD programmers. See CMOS PLD Programming
Hardware and Software Support for information on software/programming.
Parameter
Description
Typ
Max
Units
t
PR
Power-up
Reset Time
600
1,000
ns
V
RST
Power-up
Reset
Voltage
3.8
4.5
V
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| ATF22V10BQ-15XC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:High- Performance EE PLD |
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| ATF22V10BQL15GC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| ATF22V10BQL15GI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| ATF22V10BQL15GM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
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