參數(shù)資料
型號: AT90PWM1-16MUR
廠商: Atmel
文件頁數(shù): 26/90頁
文件大小: 0K
描述: MCU AVR 8K ISP FLASH 16MHZ 32QFN
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 1
系列: AVR® 90PWM 照明
核心處理器: AVR
芯體尺寸: 8-位
速度: 16MHz
連通性: SPI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 19
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 32-VQFN 裸露焊盤
包裝: 剪切帶 (CT)
其它名稱: AT90PWM1-16MURCT
32
4378C–AVR–09/08
AT90PWM1
The CAL7 bit determines the range of operation for the oscillator. Setting this bit to 0 gives the
lowest frequency range, setting this bit to 1 gives the highest frequency range. The two fre-
quency ranges are overlapping, in other words a setting of OSCCAL = 0x7F gives a higher
frequency than OSCCAL = 0x80.
The CAL6..0 bits are used to tune the frequency within the selected range. A setting of 0x00
gives the lowest frequency in that range, and a setting of 0x7F gives the highest frequency in the
range. Incrementing CAL6..0 by 1 will give a frequency increment of less than 2% in the fre-
quency range 7.3 - 8.1 MHz.
7.6
PLL
To generate high frequency and accurate PWM waveforms, the ‘PSC’s need high frequency
clock input. This clock is generated by a PLL. To keep all PWM accuracy, the frequency factor of
PLL must be configurable by software. With a system clock of 8 MHz, the PLL output is 32Mhz
or 64Mhz.
7.6.1
Internal PLL for PSC
The internal PLL in AT90PWM1 generates a clock frequency that is 64x multiplied from nomi-
nally 1 MHz input. The source of the 1 MHz PLL input clock is the output of the internal RC
Oscillator which is divided down to 1 MHz. See the Figure 7-3 on page 33.
The PLL is locked on the RC Oscillator and adjusting the RC Oscillator via OSCCAL Register
will adjust the fast peripheral clock at the same time. However, even if the possibly divided RC
Oscillator is taken to a higher frequency than 1 MHz, the fast peripheral clock frequency satu-
rates at 70 MHz (worst case) and remains oscillating at the maximum frequency. It should be
noted that the PLL in this case is not locked any more with the RC Oscillator clock.
Therefore it is recommended not to take the OSCCAL adjustments to a higher frequency than 1
MHz in order to keep the PLL in the correct operating range. The internal PLL is enabled only
when the PLLE bit in the register PLLCSR is set. The bit PLOCK from the register PLLCSR is
set when PLL is locked.
Both internal 1 MHz RC Oscillator and PLL are switched off in Power-down and Standby sleep
modes
.
Table 7-8.
Start-up Times when the PLL is selected as system clock
CKSEL
3..0
SUT1..0
Start-up Time from Power-down
and Power-save
Additional Delay from Reset
(V
CC = 5.0V)
0011
RC Osc
00
1K CK
14CK
01
1K CK
14CK + 4 ms
10
1K CK
14CK + 64 ms
11
16K CK
14CK
0101
Ext Osc
00
1K CK
14CK
01
1K CK
14CK + 4 ms
10
16K CK
14CK + 4 ms
11
16K CK
14CK + 64 ms
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AT90PWM161-16MNR 功能描述:8位微控制器 -MCU 16 MHz, QFN, 105oC, Green, T&R RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
AT90PWM161-16SN 功能描述:8位微控制器 -MCU 16 MHz, SOIC, 105oC, Green RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT