參數(shù)資料
型號: AT89S8253-24PI
廠商: Atmel
文件頁數(shù): 32/60頁
文件大小: 0K
描述: IC 8051 MCU FLASH 12K 40DIP
標準包裝: 10
系列: 89S
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: SPI,UART/USART
外圍設備: POR,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 12KB(12K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
38
3286P–MICRO–3/10
AT89S8253
10. Repeat steps 4 through 7 changing the address and data for the entire array or until the
end of the object file is reached.
11. Power-off sequence:
a.
Tri-state the address and data inputs.
b.
Disable the P3.0 pullup used for RDY/BUSY operation.
c.
Set XTAL1 to “L”.
d.
Set RST and EA pins to “L”.
e.
Turn V
CC power off.
Data Polling: The AT89S8253 features DATA Polling to indicate the end of any programming
cycle. During a write cycle in the parallel or serial programming mode, an attempted read of the
last loaded byte will result in the complement of the written datum on P0.7 (parallel mode), and
on the MSB of the serial output byte on MISO (serial mode). Once the write cycle has been com-
pleted, true data are valid on all outputs, and the next cycle may begin. DATA Polling may begin
any time after a write cycle has been initiated.
Ready/Busy: The progress of byte programming in the parallel programming mode can also be
monitored by the RDY/BSY output signal. Pin P3.0 is pulled Low after ALE goes High during
programming to indicate BUSY. P3.0 is pulled High again when programming is done to indicate
READY. P3.0 needs an external pullup (typical 10 K
Ω) when functioning as RDY/BSY.
Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed Code or
Data byte can be read back via the address and data lines for verification. The state of the lock
bits can also be verified directly in the parallel and serial programming modes.
Chip Erase: Both Flash and EEPROM arrays are erased electrically at the same time. In the
parallel programming mode, Chip Erase is initiated by using the proper combination of control
signals. The code and data arrays are written with all “1”s during the Chip Erase operation. The
User Row will also be erased if the UsrRowProEn fuse (Fuse3) = 0 (enabled state).
In the serial programming mode, a chip erase operation is initiated by issuing the Chip Erase
instruction. In this mode, Chip Erase is self-timed and also takes about 8 ms.
During Chip Erase, a serial read from any address location will return 00H at the data outputs.
Serial Programming Fuse: A programmable fuse is available to disable Serial Programming if
the user needs maximum system security. The Serial Programming Fuse can be disabled via
both the Parallel/Serial Programming Modes, but can only be enabled via the Parallel mode.
The AT89S8253 is shipped with the Serial Programming Mode enabled.
Reading the Signature Bytes: The signature bytes are read by the same procedure as a nor-
mal verification of locations 030H and 031H, except that P3.6 and P3.7 must be pulled to a logic
low. The values returned are as follows:
(030H) = 1EH indicates manufactured by Atmel
(031H) = 73H indicates AT89S8253
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