參數(shù)資料
型號(hào): AT89S52-24PU
廠商: Atmel
文件頁(yè)數(shù): 37/37頁(yè)
文件大?。?/td> 0K
描述: IC MCU 8K FLASH 24MHZ 40-DIP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 10
系列: 89S
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: UART/USART
外圍設(shè)備: WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 616 (CN2011-ZH PDF)
其它名稱: Q2897580
9
1919D–MICRO–6/08
AT89S52
Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two banks of 16-bit Data
Pointer Registers are provided: DP0 at SFR address locations 82H-83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1
selects DP0 and DPS = 1 selects DP1. The user should ALWAYS initialize the DPS bit to the appropriate value before
accessing the respective Data Pointer Register.
Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to “1” during power
up. It can be set and rest under software control and is not affected by reset.
Table 5-3.
AUXR: Auxiliary Register
AUXR
Address = 8EH
Reset Value = XXX00XX0B
Not Bit Addressable
WDIDLE
DISRTO
DISALE
Bit
765
4
3
2
1
0
Reserved for future expansion
DISALE
Disable/Enable ALE
DISALE
Operating Mode
0
ALE is emitted at a constant rate of 1/6 the oscillator frequency
1
ALE is active only during a MOVX or MOVC instruction
DISRTO
Disable/Enable Reset out
DISRTO
0
Reset pin is driven High after WDT times out
1
Reset pin is input only
WDIDLE
Disable/Enable WDT in IDLE mode
WDIDLE
0
WDT continues to count in IDLE mode
1
WDT halts counting in IDLE mode
Table 5-4.
AUXR1: Auxiliary Register 1
AUXR1
Address = A2H
Reset Value = XXXXXXX0B
Not Bit Addressable
–––
DPS
Bit
765
4
3
2
1
0
Reserved for future expansion
DPS
Data Pointer Register Select
DPS
0
Selects DPTR Registers DP0L, DP0H
1
Selects DPTR Registers DP1L, DP1H
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