參數(shù)資料
型號: AT89LV55-12PI
廠商: Atmel
文件頁數(shù): 10/32頁
文件大小: 0K
描述: IC 8051 MCU FLASH 20K 40DIP
標準包裝: 10
系列: 89LV
核心處理器: 8051
芯體尺寸: 8-位
速度: 12MHz
連通性: UART/USART
輸入/輸出數(shù): 32
程序存儲器容量: 20KB(20K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
18
0811E–MICRO–9/08
AT89LV55
Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code
data can be read back via the address and data lines for verification. The lock bits cannot be ver-
ified directly. Verification of the lock bits is achieved by observing that their features are enabled.
Figure 17-1. Programming the Flash Memory
Chip Erase:
The entire Flash array is erased electrically by using the proper combination of
control signals and by holding ALE/PROG low for 10 ms. The code array is written with all 1s.
The chip erase operation must be executed before the code memory can be reprogrammed.
Reading the Signature Bytes: The signature bytes are read by the same procedure as a nor-
mal verification of locations 030H, and 031H, except that P3.6 and P3.7 must be pulled to a logic
low. The values returned are as follows:
(030H) = 1EH indicates manufactured by Atmel
(031H) = 65H indicates 89LV55
(032H) = FFH indicates 12V programming
P1.0 - P1.7
P3.6
P2.0 - P2.5
A0-A7
ADDR.
0000H/4FFFH
SEE FLASH
PROGRAMMING
MODES TABLE
3-12 MHz
A8 - A13
A14*
P0
+5V
P2.7
PGM
DATA
PROG
V/V
I H
PP
V
I H
ALE
P3.7
XTAL2
EA
RST
PSEN
XTAL1
GND
V
CC
AT89LV55
P2.6
P3.0
*Programming address line A14 (P3.0) is not the same
as the external memory address line A14 (P2.6)
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