參數(shù)資料
型號: AT80C51RD2-RLTUM
廠商: Atmel
文件頁數(shù): 21/81頁
文件大?。?/td> 0K
描述: IC 8051 MCU 5V SPI 20MHZ 44-VQFP
標(biāo)準(zhǔn)包裝: 800
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器類型: ROMless
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LQFP
包裝: 托盤
28
4113D–8051–01/09
AT80C51RD2
Table 10-4.
PCA Module Modes (CCAPMn Registers)
There are two additional registers associated with each of the PCA modules. They are CCAPnH
and CCAPnL and these are the registers that store the 16-bit count when a capture occurs or a
compare should occur. When a module is used in the PWM mode these registers are used to
control the duty cycle of the output (see Table 10-5 and Table 10-6).
Table 10-5.
CCAPnH Registers (n = 0-4)
CCAP0H - PCA Module 0 Compare/Capture Control Register High (0FAh)
CCAP1H - PCA Module 1 Compare/Capture Control Register High (0FBh)
CCAP2H - PCA Module 2 Compare/Capture Control Register High (0FCh)
CCAP3H - PCA Module 3 Compare/Capture Control Register High (0FDh)
CCAP4H - PCA Module 4 Compare/Capture Control Register High (0FEh)
Reset Value = 0000 0000b
Not bit addressable
ECOMn
CAPPn
CAPNn
MATn
TOGn
PWMm
ECCFn
Module Function
00000
00
No Operation
X
1000
0
X
16-bit capture by a positive-edge
trigger on CEXn
X
0100
0
X
16-bit capture by a negative trigger on
CEXn
X
1100
0
X
16-bit capture by a transition on CEXn
10010
0
X
16-bit Software Timer/Compare mode.
10011
0
X
16-bit High-speed Output
10000
10
8-bit PWM
1001
X
0
X
Watchdog Timer (module 4 only)
765
4321
0
----
Bit
Number
Bit
Mnemonic
Description
7-0
-
PCA Module n Compare/Capture Control
CCAPnH Value
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