參數(shù)資料
型號(hào): AT49F1604T
廠(chǎng)商: Atmel Corp.
英文描述: 16-megabit 5-volt Only Flash Memory(16M位 5V閃速存儲(chǔ)器)
中文描述: 16兆位5伏只有閃存(1,600位5V的閃速存儲(chǔ)器)
文件頁(yè)數(shù): 3/18頁(yè)
文件大?。?/td> 337K
代理商: AT49F1604T
AT49F1604(T)/1614(T)
3
After entering the six-byte code, only single pulses on the
write control lines are required for writing into the device.
This mode (Single Pulse Byte/Word Program) is exited by
powering down the device or by pulsing the RESET pin low
for a minimum of 50 ns and then bringing it back to V
CC
.
Erase and Erase Suspend/Resume commands will not
work while in this mode; if entered, they will result in data
being programmed into the device. It is not recommended
that the six-byte code reside in the software of the final
product but only exist in external programming code.
For the AT49BV1614(T), the BYTE pin controls whether
the device data I/O pins operate in the byte or word config-
uration. If the BYTE pin is set at logic
1
, the device is in
word configuration, I/O0 - I/O15 are active and controlled
by CE and OE.
If the BYTE pin is set at logic
0
, the device is in byte con-
figuration, and only data I/O pins I/O0 - I/O7 are active and
controlled by CE and OE. The data I/O pins I/O8 - I/O14
are tri-stated, and the I/O15 pin is used as an input for the
LSB (A-1) address function.
Block Diagram
Device Operation
READ:
The AT49F16X4(T) is accessed like an EPROM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins are
asserted on the outputs. The outputs are put in the high-
impedance state whenever CE or OE is high. This dual-line
control gives designers flexibility in preventing bus
contention.
COMMAND SEQUENCES:
When the device is first pow-
ered on it will be reset to the read or standby mode,
depending upon the state of the control line inputs. In order
to perform other device functions, a series of command
sequences are entered into the device. The command
sequences are shown in the Command Definitions table on
page 6 (I/O8 - I/O15 are don
t care inputs for the command
codes). The command sequences are written by applying a
IDENTIFIER
REGISTER
STATUS
REGISTER
DATA
COMPARATOR
O
M
OUTPUT
BUFFER
INPUT
BUFFER
COMMAND
REGISTER
D
R
Y-GATING
WRITE STATE
MACHINE
PROGRAM/ERASE
VOLTAGE SWITCH
CE
WE
OE
RESET
BYTE
RDY/BUSY
VCC
GND
Y-DECODER
X-DECODER
INPUT
BUFFER
ADDRESS
LATCH
I/O0 - I/O15/A-1
A0 - A19
PLANE B
SECTORS
PLANE A SECTORS
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