- 您現(xiàn)在的位置：買賣IC網 > PDF目錄19914 > AT17F080-30JU (Atmel)IC FLASH CONFIG 8M 20PLCC PDF資料下載
參數(shù)資料
| 型號： | AT17F080-30JU |
| 廠商： | Atmel |
| 文件頁數(shù)： | 16/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FLASH CONFIG 8M 20PLCC |
| 標準包裝： | 50 |
| 可編程類型： | 閃存 |
| 存儲容量： | 8Mb |
| 電源電壓： | 2.97 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 20-LCC（J 形引線） |
| 供應商設備封裝： | 20-PLCC |
| 包裝： | 管件 |
| 產品目錄頁面： | 609 (CN2011-ZH PDF) |
| 配用： | ATDH2225-ND - CABLE ISP FOR AT17 ATDH2200E-ND - CONFIGURATOR PROGRAM BOARD KIT |
6
3039K–CNFG–2/08
AT17F040/080
5.4
PAGESEL[1:0](2)
Page select inputs. Used to determine which of the 4 memory pages are targeted during a serial
configuration download. The address space for each of the pages is shown in Table 5-2. When
SER_EN is Low (ISP mode) these pins have no effect.
5.5
RESET/OE(1)
Output Enable (active High) and RESET (active Low) when SER_EN is High. A Low level on
RESET/OE resets both the address and bit counters. A High level (with CE Low) enables the
data output driver.
5.6
CE(1)
Chip Enable input (active Low). A Low level (with OE High) allows CLK to increment the address
counter and enables the data output driver. A High level on CE disables both the address and bit
counters and forces the device into a low-power standby mode. Note that this pin will not
enable/disable the device in the 2-wire Serial Programming mode (SER_EN Low).
5.7
GND
Ground pin. A 0.2 F decoupling capacitor between V
CC and GND is recommended.
5.8
CEO
Chip Enable Output (when SER_EN is High). This output goes Low when the internal address
counter has reached its maximum value. If the PAGE_EN input is set High, the maximum value
is the highest address in the selected partition. The PAGESEL[1:0] inputs are used to make the
4 partition selections. If the PAGE_EN input is set Low, the device is not partitioned and the
address maximum value is the highest address in the device, see Table 5-2 on page 6. In a
daisy chain of AT17F Series devices, the CEO pin of one device must be connected to the CE
input of the next device in the chain. It will stay Low as long as CE is Low and OE is High. It will
then follow CE until OE goes Low; thereafter, CEO will stay High until the entire EEPROM is
read again.
Notes:
1. This pin has an internal 20 k
pull-up resistor.
2. This pin has an internal 30 k
pull-down resistor.
Table 5-2.
Address Space
Paging Decodes
AT17F040 (4 Mbits)
AT17F080 (8 Mbits)
PAGESEL = 00, PAGE_EN = 1
00000 – 0FFFFh
00000 – 1FFFFh
PAGESEL = 01, PAGE_EN = 1
10000 – 1FFFFh
20000 – 3FFFFh
PAGESEL = 10, PAGE_EN = 1
20000 – 2FFFFh
40000 – 5FFFFh
PAGESEL = 11, PAGE_EN = 1
30000 – 3FFFFh
60000 – 7FFFFh
PAGESEL = XX, PAGE_EN = 0
00000 – 3FFFFh
00000 – 7FFFFh
相關PDF資料 |
PDF描述 |
|---|---|
| LTC4211IS8 | IC CTRLR HOTSWAP CURR CTRL 8SOIC |
| TACA107M004XTA | CAP TANT 100UF 4V 20% 1206 |
| VE-JNR-CY-B1 | CONVERTER MOD DC/DC 7.5V 50W |
| RSM43DSEH | CONN EDGECARD 86POS .156 EYELET |
| TEA1733LT/N1,118 | IC CTLR SMPS SW SO8 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AT17F080-30JU SL383 | 制造商:Atmel Corporation 功能描述:FPGA SERIAL CONFIG FLASH, 8M - 30MHZ, 20 PLCC, IND TEMP, GRE - Tape and Reel |
| AT17F080-30TQC | 功能描述:FPGA-配置存儲器 FPGA SERIAL CONFIG 30MHZ 3.3V COM TEMP RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17F080-30TQI | 功能描述:FPGA-配置存儲器 FPGA SERIAL CONFIG 30MHZ 3.3V IND TEMP RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17F080A-30CU | 功能描述:FPGA-配置存儲器 SER CONFIG FLASH-8M ALTERA PINOUT-30MHZ RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17F080A-30JC | 功能描述:FPGA-配置存儲器 Serial Flash RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:PLCC-20 |
發(fā)布緊急采購，3分鐘左右您將得到回復。