參數(shù)資料
型號: AT1367D
廠商: Aimtron Technology Corp.
英文描述: 1MHz, 800mA Synchronous Buck Converter With Power Good Detector & LDO
中文描述: 1MHz的,800mA的同步降壓轉(zhuǎn)換器與電源良好探測器
文件頁數(shù): 10/14頁
文件大?。?/td> 659K
代理商: AT1367D
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
efficiency when selecting an inductor. The inductor is selected to limit the ripple
current to some predetermined value, typically 20~40% of the full load current at the
maximum input voltage. The formula of inductance value is as below:
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878 Fax: 886-3-563-0879 WWW:
http://www.aimtron.com.tw
3/2/2006
REV:1.2
Email:
service@aimtron.com.tw
10
)
(
4
~
2
MAX
OUT
L
I
I
×
=
×
=
IN
OUT
V
L
OUT
V
V
I
f
L
1
L
t
V
2
V
(
I
I
2
I
I
ON
OUT
×
IN
O
L
O
PK
×
+
=
+
=
)
Power Good Indicator with Adjustable Time Delay
The PG and /PG pin terminal is an open drain output of N-MOS. Connect a resistor
from PG and /PG pin to VCC or OUT1 to create a logic signal. If OUT1 pin is less
than 2.97V (typ.) this pin is pulled to ground. When OUT1 pin is above 2.97V and
with a delay time this pin is open. PG and /PG pin is forced low when in UVLO. The
formula of adjustable delay time is as below :
8
×
=
DELAY
I
C
time
delay
The Dissipation
The power loss is given by:
IN
s
s
f
r
OUT
IN
N
ON
DS
OUT
P
ON
DS
OUT
DC
DC
LOSS
P
V
I
f
t
t
I
V
D
R
I
D
R
I
×
+
×
+
×
×
+
×
×
+
×
×
=
)
(
)
1
1
)
(
2
1
)
(
2
1
)
(
)
(
2
1
2
)
(
OUT
OUT
OUT
LDO
LOSS
P
V
V
I
×
=
)
(
)
(
)
(
)
(
LDO
LOSS
P
DC
DC
LOSS
P
JA
A
MAX
J
T
T
+
×
+
=
θ
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