參數(shù)資料
型號: ARA2004S12P1
廠商: ANADIGICS INC
元件分類: 衰減器
英文描述: Reverse Amplifier with Step Attenuator
中文描述: 5 MHz - 100 MHz RF/MICROWAVE NARROW BAND MEDIUM POWER AMPLIFIER
封裝: S12, SSOP-28
文件頁數(shù): 12/20頁
文件大?。?/td> 276K
代理商: ARA2004S12P1
12
Data Sheet - Rev 2.1
07/2005
ARA2004
DATA
CLOCK
ENABLE
ENABLE
OR
D
7
: MSB
D
6
D
4
D
3
D
1
D
0
: LSB
Table 6: Programming Word
T
B
A
T
A
D
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
e
u
V
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
P
LOGIC PROGRAMMING
Table 7: Data Description
Figure 17: Serial Data Input Timing
E
U
L
A
V
N
p
y
O
I
b
T
=
C
0
N
,
U
n
F
o
)
s
a
=
1
7
P
A
/
N
6
P
A
/
N
5
P
t
B
r
u
n
e
A
B
d
2
3
4
P
t
B
r
u
n
e
A
B
d
6
1
3
P
t
B
r
u
n
e
A
B
d
8
2
P
t
B
r
u
n
e
A
B
d
4
1
P
t
B
r
u
n
e
A
B
d
2
0
P
t
B
r
u
n
e
A
B
d
1
Programming Instructions
The programming word is set through an 8 bit shift
register via the data, clock and enable lines. The
data is entered in order with the most significant bit
(MSB) first and the least significant bit (LSB) last.
The enable line must be low for the duration of the
data entry, then set high to latch the shift register.
The rising edge of the clock pulse shifts each data
value into the register.
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