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參數(shù)資料
| 型號： | AR-20441-12 |
| 廠商： | Conexant Systems, Inc. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:12; Series:; Body Material:Aluminum Alloy; Connecting Termination:Solder; Connector Shell Size:28; Circular Contact Gender:Pin; Circular Shell Style:Cable Receptacle; Insert Arrangement:28-18 RoHS Compliant: No |
| 中文描述： | AccessRunner ADSL調(diào)制解調(diào)器的PCI設(shè)備的應(yīng)用設(shè)置 |
| 文件頁數(shù)： | 12/24頁 |
| 文件大小： | 159K |
| 代理商： | AR-20441-12 |
AccessRunner
Controller-less ADSL Modem Device Set for PCI Applications
12
Conexant
Proprietary Information
Doc. No. 100394B
October 19, 1999
Pin Name
I/O
Description
R_INTER_DATA
O
Receive Interleaved Data Bit Output
Clocked at BIT_CLOCK rate.
R_INTER_SUPER#
O
Receive Interleaved Data Bit Output Superframe Qualifier
PCI CONTROLLER INTERFACE
D[15:0]
I/O
PCI Controller Interface Data Bus
16-bit input/output bus to send/receive data to/from PCI controller.
A[9:0]
I
PCI Controller Interface Address Bus
10-bit input bus to receive address from PCI controller.
WR#
I
Data Write Enable
RD#
I
Data Read Enable
CS#
I
Chip Select
IRQ[1:0]#
O
Programmable Interrupts
MISCELLANEOUS
RST#
I
Global Chip Reset
When low, puts chip into reset condition.
MCLK
I
High-speed Master Clock
Connect to 35.328 MHz VCXO, which is 16 times the maximum Nyquist rate.
VXCO_CTRL
O
Oversampled VCXO analog control voltage
MON_OUT
O
1-bit serial D/A output used for constellation monitoring
MON_CLK
O
Serial Monitor Clock
Operates at 138 kHz.
MON_DONE
O
New Symbol Constellation Qualifier
DMCK_ALT
I
External 2x Clock
LTR
O
8 kHz Local Timing Reference
NTR
I/O
8 kHz Network Timing Reference
NTRCTL
I
Network Timing Reference I/O Control
TXSOC0
I
TC0 Block Transmit Start of Cell.
TXSOC1
I
TC1 Block Transmit Start of Cell.
RXSOC0
O
TC0 Block Receive Start of Cell
RXSOC1
O
TC1 Block Receive Start of Cell
PWR_DN
I
Power Down Control Pin
POWER AND GROUND
VDD
3.3V Power (I/O)
VDDcore
2.5V Power (Core)
GND
Ground
VGG
I/O Clamp Power Supply (connect to 5 volt supply for 5 volt tolerance)
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