ProASICPLUS Flash Family FPGAs v5.9 2-53 Table 2-50 JTAG Switching Chara" />
參數(shù)資料
型號: APA750-FGG896I
廠商: Microsemi SoC
文件頁數(shù): 139/178頁
文件大?。?/td> 0K
描述: IC FPGA PROASIC+ 750K 896-FBGA
標準包裝: 27
系列: ProASICPLUS
RAM 位總計: 147456
輸入/輸出數(shù): 562
門數(shù): 750000
電源電壓: 2.3 V ~ 2.7 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 896-BGA
供應商設備封裝: 896-FBGA(31x31)
ProASICPLUS Flash Family FPGAs
v5.9
2-53
Table 2-50 JTAG Switching Characteristics
Description
Symbol
Min
Max
Unit
Output delay from TCK falling to TDI, TMS
tTCKTDI
–4
4
ns
TDO Setup time before TCK rising
tTDOTCK
10
ns
TDO Hold time after TCK rising
tTCKTDO
0
ns
TCK period
tTCK
100 2
1,000
ns
RCK period
tRCK
100
1,000
ns
Notes:
1. For DC electrical specifications of the JTAG pins (TCK, TDI, TMS, TDO, TRST), refer to Table 2-22 on page 2-34 when VDDP = 2.5 V
and Table 2-24 on page 2-38 when VDDP = 3.3 V.
2. If RCK is being used, there is no minimum on the TCK period.
Figure 2-27 JTAG Operation Timing
TCK
TMS, TDI
TDO
tTCK
tTCKTDI
tTCKTDO
tTDOTCK
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