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參數資料
| 型號： | AN7924T |
| 廠商： | PANASONIC CORP |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | 3-pin Negative Output Voltage Regulators (1A Type) |
| 中文描述： | 24 V FIXED NEGATIVE REGULATOR, PSFM3 |
| 封裝： | TO-220AB, 3 PIN |
| 文件頁數： | 4/8頁 |
| 文件大?。?/td> | 102K |
| 代理商： | AN7924T |
4
V
O
–8.3
V
–8
V
O
V
REG
IN
160
80
160
80
4.5
mV
mV
mV
mV
mA
mA
mA
μ
V
6
2
REG
L
12
4
2.2
I
bias
52
71
V
no
RR
dB
V
A
1
0.5
–8.4
56
–7.7
–7.6
1.1
2.1
– 0.6
typ
Output voltage
Output voltage tolerance
Line regulation
Load regulation
Bias current
Input bias fluctuation
Load bias current fluctuation
Output noise voltage
Ripple rejection ratio
Minimum input/output voltage difference
Peak output current
Output voltage temperature coefficient
Parameter
Symbol
Condition
min
max
Unit
V
I
=
–10 to –23V,
I
O
=
5mA to 1A, P
D
*
V
I
=
–10.5 to –25V, T
j
=
25C
V
I
=
–11 to –17V, T
j
=
25C
I
O
=
5mA to 1.5A, T
j
=
25C
I
O
=
250 to 750mA, T
j
=
25C
T
j
=
25C
V
I
=
–10.5 to –25V, T
j
=
25C
I
O
=
5mA to 1A, T
j
=
25C
f
=
10Hz to 100kHz, Ta
=
25C
V
I
=
–11 to –21V, I
O
=
100mA, f
=
120Hz
I
O
=
1A, T
j
=
25C
T
j
=
25C
I
O
=
5mA, T
j
=
0 to 125C
T
j
=
25C
I
bias (IN)
I
bias (L)
V
DIF (min.)
I
O (Peak)
V
O
/Ta
mV/C
Note 1) The specified condition T
=
25C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) Unless otherwise specified, V
=
–14V, I
=
500mA, C
I
=
2
μ
F, C
O
=
1
μ
F, T
j
=
0 to 125C
* AN7900T series : 15W, AN7900F series : 10.25W
I
Electrical Characteristics
(Ta
=
25C) (continued)
AN7908T/AN7908F (–8V Type)
<
=
V
O
–9.35
V
–9
V
O
V
REG
IN
180
90
180
90
4.5
mV
mV
mV
mV
mA
mA
mA
μ
V
7
2
REG
L
12
4
2.2
I
bias
58
71
dB
V
A
1
0.5
–9.45
56
–8.65
–8.55
RR
1.1
2.1
–0.6
typ
Output voltage tolerance
Input bias fluctuation
Load bias current fluctuation
Output noise voltage
Ripple rejection ratio
Minimum input/output voltage difference
Peak output current
Output voltage temperature coefficient
Parameter
Symbol
Condition
min
max
Unit
Output voltage
Line regulation
Load regulation
Bias current
V
no
V
I
=
–11.5 to –24V,
I
O
=
5mA to 1A, P
D
*
V
I
=
–11.5 to –26V, T
j
=
25C
V
I
=
–12 to –18V, T
j
=
25C
I
O
=
5mA to 1.5A, T
j
=
25C
I
O
=
250 to 750mA, T
j
=
25C
T
j
=
25C
V
I
=
–11.5 to –26V, T
j
=
25C
I
O
=
5mA to 1A, T
j
=
25C
f
=
10Hz to 100kHz, Ta
=
25C
V
I
=
–12 to –22V, I
O
=
100mA, f
=
120Hz
I
O
=
1A, T
j
=
25C
T
j
=
25C
I
O
=
5mA, T
j
=
0 to 125C
T
j
=
25C
I
bias (IN)
I
bias (L)
V
DIF (min.)
I
O (Peak)
V
O
/Ta
mV/C
Note 1) The specified condition T
j
=
25C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) Unless otherwise specified, V
=
–15V, I
=
500mA, C
I
=
2
μ
F, C
O
=
1
μ
F, T
j
=
0 to 125C
* AN7900T series : 15W, AN7900F series : 10.25W
AN7909T/AN7909F (–9V Type)
<
=
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