參數(shù)資料
型號(hào): AMIS42675ICAA1G
廠商: ON Semiconductor
文件頁(yè)數(shù): 6/12頁(yè)
文件大小: 0K
描述: IC TRANSCEIVER CAN LP HS 8SOIC
標(biāo)準(zhǔn)包裝: 96
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: CAN
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 管件
AMIS42675
http://onsemi.com
3
Table 2. PIN DESCRIPTION
Pin
Name
Description
1
TxD
Transmit Data Input; Low Input → Dominant Driver; Internal Pullup Current
2
GND
Ground
3
VCC
Supply Voltage
4
RxD
Receive Data Output; Dominant Transmitter → Low Output
5
VSPLIT CommonMode Stabilization Output
6
CANL
LowLevel CAN Bus Line (Low in Dominant Mode)
7
CANH
HighLevel CAN Bus Line (High in Dominant Mode)
8
STB
Standby Mode Control Input
Table 3. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
Supply Voltage
0.3
+7
V
VCANH
DC Voltage at Pin CANH
0 < VCC < 5.25 V; No Time
Limit
50
+50
V
VCANL
DC Voltage at Pin CANL
0 < VCC < 5.25 V; No Time
Limit
50
+50
V
VSPLIT
DC Voltage at Pin VSPLIT
0 < VCC < 5.25 V; No Time
Limit
50
+50
V
VTxD
DC Voltage at Pin TxD
0.3
VCC + 0.3
V
VRxD
DC Voltage at Pin RxD
0.3
VCC + 0.3
V
VSTB
DC Voltage at Pin STB
0.3
VCC + 0.3
V
Vtran(CANH)
Transient Voltage at Pin CANH
Note 2
300
+300
V
Vtran(CANL)
Transient Voltage at Pin CANL
Note 2
300
+300
V
Vtran(VSPLIT)
Transient Voltage at Pin VSPLIT
Note 2
300
+300
V
Vesd(
Electrostatic Discharge Voltage at all
Pins
Note 4
Note 5
5
750
+5
+750
kV
V
Latchup
Static Latchup at All Pins
Note 4
120
mA
Tstg
Storage Temperature
55
+150
°C
TA
Ambient Temperature
40
+125
°C
TJ
Maximum Junction Temperature
40
+170
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Applied transient waveforms in accordance with ISO 7637 part 3, test pulses 1, 2, 3a, and 3b (see Figure 3).
3. Standardized human body model electrostatic discharge (ESD) pulses in accordance to MIL883 method 3015.7.
4. Static latchup immunity: Static latchup protection level when tested according to EIA/JESD78.
5. Standardized charged device model ESD pulses when tested according to EOS/ESD DS5.31993.
Table 4. THERMAL CHARACTERISTICS
Symbol
Parameter
Conditions
Value
Unit
Rth(vja)
Thermal Resistance from JunctiontoAmbient in SOIC8 Package
In Free Air
145
k/W
Rth(vjs)
Thermal Resistance from JunctiontoSubstrate of Bare Die
In Free Air
45
k/W
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