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參數(shù)資料
| 型號： | AM79C873 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | NetPHY⑩ -1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support |
| 中文描述： | NetPHY⑩-1 10/100 Mbps以太網(wǎng)物理層的單芯片收發(fā)器與100BASE - FX的支持 |
| 文件頁數(shù)： | 29/44頁 |
| 文件大小： | 543K |
| 代理商： | AM79C873 |
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Am79C873
29
P R E L I M I N A R Y
AMD Specified Configuration and Status
Register (DSCSR) - Register 17
Bit
Bit Name
Default
Description
17.15
100FDX
1, RO
100 M Full Duplex Operation
:
After Auto-Negotiation is completed, the results will be written to this bit.
A 1 in this bit position indicates 10 0M Full Duplex operation. The software
can read bits [15:12] to determine which mode is selected after Auto-
Negotiation. This bit is invalid when Auto-Negotiation is disabled.
17.14
100HDX
1, RO
100 M Half Duplex Operation
:
After Auto-Negotiation is completed, the results will be written to this bit.
A 1 in this bit position indicates 100 M Half Duplex operation. The software
can read bits [15:12] to determine which mode is selected after Auto-
Negotiation. This bit is invalid when Auto-Negotiation is disabled.
17.13
10FDX
1, RO
10 M Full Duplex Operation
:
After Auto-Negotiation is completed, the results will be written to this bit.
A 1 in this bit position indicates 10 M Full Duplex operation. The software
can read bits [15:12] to determine which mode is selected after Auto-
Negotiation. This bit is invalid when Auto-Negotiation is disabled.
17.12
10HDX
1, RO
10 M Half Duplex Operation
:
After Auto-Negotiation is completed, the results will be written to this bit.
A 1 in this bit position indicates 10M Half Duplex operation. The software
can read bits [15:12] to determine which mode is selected after Auto-
Negotiation. This bit is invalid when Auto-Negotiation is disabled.
17.11-
17.10
Reserved
0, RW
Reserved
:
Write as 0, ignore on read.
17.8-17.4
PHYAD[4:0]
(PHYAD), RW
PHY Address Bit 4:0
:
The values of the PHYAD[4:0] pins are latched to this register at power-
up/reset. The first PHY address bit transmitted or received is the MSB (bit
4). A station management entity connected to multiple PHY entities must
know the appropriate address of each PHY. A PHY address of <00000>
will cause the isolate bit of the BMCR (bit 10, Register Address 00) to be
set.
Bit
Bit Name
Default
Description
17.3-17.0
ANMB[3:0]
0, RO
Auto-Negotiation Monitor Bits
:
These bits are for debug only. The Auto-Negotiation status will be written
to these bits.
b3
b2
b1
b0
0
0
0
0
In IDLE state
0
0
0
1
Ability match
0
0
1
0
Acknowledge match
0
0
1
1
Acknowledge match fail
0
1
0
0
Consistency match
0
1
0
1
Consistency match fail
0
1
1
0
Parallel detect signal_link_ready
0
1
1
1
Parallel detect signal_link_ready fail
1
0
0
0
Auto-Negotiation completed successfully
相關PDF資料 |
PDF描述 |
|---|---|
| AM79C873KCW | NetPHY⑩ -1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support |
| AM79C874VI | NetPHY-1LP Low Power 10/100-TX/FX Ethernet Transceiver |
| Am79C874 | NetPHY-1LP Low Power 10/100-TX/FX Ethernet Transceiver |
| AM79C874VC | NetPHY-1LP Low Power 10/100-TX/FX Ethernet Transceiver |
| AM79C875 | NetPHY⑩ 4LP Low Power Quad 10/100-TX/FX Ethernet Transceiver |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C873KCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:NetPHY⑩ -1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support |
| AM79C874 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:NetPHY-1LP Low Power 10/100-TX/FX Ethernet Transceiver |
| AM79C874KC/W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Transceiver |
| AM79C874VC | 制造商:Advanced Micro Devices 功能描述:PHY 1-CH 10Mbps/100Mbps 80-Pin TQFP 制造商:AMD (Advanced Micro Devices) 功能描述:PHY 1-CH 10Mbps/100Mbps 80-Pin TQFP |
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