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參數(shù)資料
| 型號： | AM49PDL129BH85IT |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲器 |
| 英文描述： | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA73 |
| 封裝： | 8 X 11.60 MM, FBGA-73 |
| 文件頁數(shù)： | 81/86頁 |
| 文件大?。?/td> | 588K |
| 代理商： | AM49PDL129BH85IT |
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December 16, 2003
Am49PDL127BH/Am49PDL129BH
79
A D V A N C E I N F O R M A T I O N
pSRAM AC CHARACTERISTICS
Notes:
1. If the device is using the I/Os to output data, input signals of reverse polarity must not be applied.
2. If OE# is high during the write cycle, the outputs will remain at high impedance.
Figure 31.
Pseudo SRAM Write Cycle—
UB#s and LB#s Control
t
WC
Valid Data In
Addresses
A20 to A0
WE#
CE#1
CE2
UB#, LB#
D
IN
DQ15 to DQ0
D
OUT
DQ15 to DQ0
t
DS
t
WR
t
WP
t
CW
High-Z
High-Z
t
CH
t
DH
t
AS
t
BW
t
BE
t
COE
t
ODW
相關(guān)PDF資料 |
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| AM49PDL127BH | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS |
| AM49PDL127BH66IS | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS |
| AM49PDL129AH61IS | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
| AM49PDL127AH | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
| AM49PDL127AH61IS | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
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