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參數(shù)資料
| 型號(hào)： | AM49PDL127AH70IS |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲(chǔ)器 |
| 英文描述： | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA73 |
| 封裝： | 8 X 11.60 MM, FBGA-73 |
| 文件頁(yè)數(shù)： | 75/82頁(yè) |
| 文件大?。?/td> | 565K |
| 代理商： | AM49PDL127AH70IS |
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December 18, 2003
Am49PDL127AH/Am49PDL129AH
73
A D V A N C E I N F O R M A T I O N
PSEUDO SRAM AC CHARACTERISTICS
Power Up Time
When powering up the SRAM, maintain V
CC
s for 100 μs minimum with CE#1s at V
IH
.
Read Cycle
Notes:
1. CE1#s = OE# = V
IL
, CE2s = WE# = V
IH
, UB#s and/or LB#s = V
IL
2. Do not access device with cycle timing shorter than t
RC
for continuous periods < 10 μs.
Figure 26.
Pseudo SRAM Read Cycle—Address Controlled
Parameter
Symbol
Description
Speed
Unit
61
70
t
RC
Read Cycle Time
Min
55
70
ns
t
AA
Address Access Time
Max
55
70
ns
t
CO1
, t
CO2
Chip Enable to Output
Max
55
70
ns
t
OE
Output Enable Access Time
Max
30
35
ns
t
BA
LB#s, UB#s to Access Time
Max
55
70
ns
t
LZ1
, t
LZ2
Chip Enable (CE1#s Low and CE2s High) to Low-Z
Output
Min
5
ns
t
BLZ
UB#, LB# Enable to Low-Z Output
Min
5
ns
t
OLZ
Output Enable to Low-Z Output
Min
5
ns
t
HZ
Chip Disable to High-Z Output
Max
25
ns
t
BHZ
UB#s, LB#s Disable to High-Z Output
Max
25
ns
t
OHZ
Output Disable to High-Z Output
Max
25
ns
t
OH
Output Data Hold from Address Change
Min
10
ns
Address
Data Out
Previous Data Valid
Data Valid
t
AA
t
RC
t
OH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM49PDL127AH70IT | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
| AM49PDL129AH | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
| AM49PDL129AH61IT | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
| AM49PDL129AH70IS | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
| AM49PDL129AH70IT | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM49PDL127AH70IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) CMOS Pseudo Static RAM |
| AM49PDL127BH | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS |
| AM49PDL127BH66IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS |
| AM49PDL127BH66IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS |
| AM49PDL127BH85IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS |
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