參數(shù)資料
型號(hào)： AM49LV128BMAH11NS
廠商： SPANSION LLC
元件分類(lèi)： 存儲(chǔ)器
英文描述： 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA64
封裝： 12 X 9 MM, FBGA-64
文件頁(yè)數(shù)： 4/98頁(yè)
文件大小： 1016K
代理商： AM49LV128BMAH11NS
2
Am49LV128BM
June 17, 2004
GENERAL DESCRIPTION
The 128 Mbit MirrorBit device is a 128 Mbit, 3.0 volt
single power supply flash memory devices organized
as 8,388,608 words. The device has a 16-bit wide data
bus. The device can be programmed either in the host
system or in standard EPROM programmers.
An access time of 105 or 110 ns is available. Each de-
vice has separate chip enable (CE#), write enable
(WE#) and output enable (OE#) controls.
Each device requires only a
single 3.0 volt power
supply
for both read and write functions. In addition to
a V
CC
input, a high-voltage
accelerated program
(
WP#/
ACC)
input provides shorter programming times
through increased current. This feature is intended to
facilitate factory throughput during system production,
but may also be used in the field if desired.
The device is entirely command set compatible with
the
JEDEC single-power-supply Flash standard
.
Commands are written to the device using standard
microprocessor write timing. Write cycles also inter-
nally latch addresses and data needed for the pro-
gramming and erase operations.
The
sector erase architecture
allows memory sec-
tors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully
erased when shipped from the factory.
Device programming and erasure are initiated through
command sequences. Once a program or erase oper-
ation has begun, the host system need only poll the
DQ7 (Data# Polling) or DQ6 (toggle)
status bits
to de-
termine whether the operation is complete. To facilitate
programming, an
Unlock Bypass
mode reduces com-
mand sequence overhead by requiring only two write
cycles to program data instead of four.
Hardware data protection
measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The hardware sector
protection feature disables both program and erase
operations in any combination of sectors of memory.
This can be achieved in-system or via programming
equipment.
The
Erase Suspend/Erase Resume
feature allows
the host system to pause an erase operation in a
given sector group to read or program any other sector
group and then complete the erase operation. The
Program Suspend/Program Resume
feature en-
ables the host system to pause a program operation in
a given sector group to read any other sector group
and then complete the program operation.
The
hardware RESET# pin
terminates any operation
in progress and resets the device, after which it is then
ready for a new operation. The RESET# pin may be
tied to the system reset circuitry. A system reset would
thus also reset the device, enabling the host system to
read boot-up firmware from the Flash memory device.
The device reduces power consumption in the
standby mode
when it detects specific voltage levels
on CE# and RESET#, or when addresses have been
stable for a specified period of time.
The
SecSi
(Secured Silicon) Sector
provides a
128-word area for code or data that can be perma-
nently protected. Once this sector is protected, no fur-
ther changes within the sector can occur.
The
Write Protect (WP#
/ACC
)
feature protects the
last sector by asserting a logic low on the WP# pin.
AMD MirrorBit flash technology combines years of
Flash memory manufacturing experience to produce
the highest levels of quality, reliability and cost effec-
tiveness. The device electrically erases all bits within a
sector simultaneously via hot-hole assisted erase. The
data is programmed using hot electron injection.
RELATED DOCUMENTS
For a comprehensive information on MirrorBit prod-
ucts, including migration information, data sheets, ap-
plication notes, and software drivers, please see
www.amd.com
→
Flash Memory
→
Product Informa-
tion
→
MirrorBit
→
Flash Information
→
Technical Docu-
mentation. The following is a partial list of documents
closely related to this product:
MirrorBit Flash Memory Write Buffer Programming
and Page Buffer Read
Implementing a Common Layout for AMD MirrorBit
and Intel StrataFlash Memory Devices
Migrating from Single-byte to Three-byte Device IDs
相關(guān)PDF資料
PDF描述
AM49LV128BMAH11NT 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMAH15NS 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMAH15NT 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMAL11NS 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMAL11NT 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM49LV128BMAH11NT 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMAH15NS 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMAH15NT 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMAL11NS 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMAL11NT 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
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