- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375271 > AFE1203 Circular Connector; No. of Contacts:15; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-15 RoHS Compliant: No PDF資料下載
參數(shù)資料
| 型號： | AFE1203 |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:15; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-15 RoHS Compliant: No |
| 中文描述： | 2Mbps的，單對HDSL模擬前端 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大小： | 193K |
| 代理商： | AFE1203 |
8
AFE1203
TIMING DIAGRAM
FIGURE 3. Timing Diagram.
RECEIVE TIMING
The rxSYNC signal controls portions of the A/D converter’s
decimation filter and the data output timing of the A/D
converter. It is generated at the symbol rate by the user and
must be synchronized with txCLK. The leading edge of
rxSYNC can occur at the leading edge of txCLK or it can be
shifted by the user in increments of 1/16 of a symbol period
to one of 15 discrete delay times after the leading edge of
txCLK.
RECEIVE OUTPUT DATA RATE
The receive channel delta-sigma A/D converter of the
AFE1203 uses a modulator which operates at an oversampling
rate of 24X the symbol rate. The A/D converter’s decimation
filter downsamples the modulator output by a factor of 12.
The bandwidth of the decimation filter is equal to one-half
the symbol rate. This yields two output words per symbol
period. These two output words are shown as Data 1 and
Data 1a in Figure 3. The specifications of the AFE1203
assume that one A/D converter output is used per symbol
period and the other output is ignored. The Receive Timing
diagram above suggests using the rising edge of the rxSYNC
pulse to read the first data output in a symbol period. Either
data output may be used. Both data outputs may be used for
more flexible post-processing.
t
tx1
t
tx2
t
tx1
/4
t
tx1
/2
nt
tx1
/16 + 59t
tx1
/96
nt
tx1
/16 + 11t
tx1
/96
Data 1
Data 1a
Data 2
3t
tx1
/4
txCLK
Transmit Timing
txDAT
P
(+3 Symbol)
txDAT
P
(+1 Symbol)
txDAT
P
(–1 Symbol)
txDAT
P
(–3 Symbol)
rxSYNC
Receive Timing
rxD13 - rxD0
t
tx1
/16 min
nt
tx1
/16
5ns
5ns
NOTES: (1) Any transmit sequence not shown will result in a zero symbol. (2) All transitions are specified relative to the rising edge of
txCLK. (3) Maximum allowable error for any txDAT edge is
±
t
/12 (
±
72ns for single pair E1 rate). (4) txDAT
is the inverse of txDAT
.
(5) Both txDAT inputs are read by the AFE12 03 at 1/8, 3/8, and 5/8 of a symbol period from the rising edge of txCLK. (6) rxSYNC can
shift to one of 16 discrete delay times from the rising edge of txCLK. (7) It is recommended that rxD13 - rxD0 be read on the rising edge
of rxSYNC.
5ns
5ns
相關PDF資料 |
PDF描述 |
|---|---|
| AFE1203E | LJT 18C 18#20 PIN PLUG |
| AFE1205 | LJT 18C 18#20 PIN PLUG |
| AFE1205E | Circular Connector; No. of Contacts:18; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:15-18 RoHS Compliant: No |
| AFE1224 | 2Mbps, Single Pair ANALOG FRONT END |
| AFE1224E | Circular Connector; No. of Contacts:18; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-18 RoHS Compliant: No |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AFE1203E | 制造商:Texas Instruments 功能描述: |
| AFE1203E/1K | 功能描述:電信線路管理 IC 2Mbps Sngl Pair HDSL Anlg Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1203E/1KG4 | 功能描述:電信線路管理 IC 2Mbps Sngl Pair HDSL Anlg Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1205 | 制造商:BB 制造商全稱:BB 功能描述:2Mbps, Single Pair HDSL ANALOG FRONT END |
| AFE1205E | 功能描述:電信線路管理 IC 2Mbps Sngl Pair HDSL Anlg Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復。