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| 型號： | AFE1104 |
| 英文描述： | LJT 12C 8#20 4#16 PIN PLUG |
| 中文描述： | HDSL / MDSL模擬前端 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 203K |
| 代理商： | AFE1104 |
6
AFE1104
THEORY OF OPERATION
The transmit channel consists of a switched-capacitor pulse
forming network followed by a differential line driver. The
pulse forming network receives symbol data from
SPAROW’S DAC+ line and generates a 2B1Q output wave-
form. The output meets the pulse mask and power spectral
density requirements defined in European Telecommunica-
tions Standards Institute document RTR/TM-03036 for E1
mode and in sections 6.2.1 and 6.2.2.1 of Bellcore technical
advisory TA-NWT-001210 for T1 mode. The differential
line driver uses a composite output stage combining class B
operation (for high efficiency driving large signals) with
class AB operation (to minimize crossover distortion).
The receive channel is designed around a fourth-order delta
sigma A/D converter. It includes a difference amplifier that
can be used with an external compromise hybrid for first
order analog crosstalk reduction. A programmable gain
amplifier with gains of 0dB to +9dB is also included. The
delta sigma modulator operating at a 24X oversampling ratio
produces 14 bits of resolution at output rates up to 584kHz.
The basic functionality of the AFE1104 is illustrated in
Figure 1 shown below.
The receive channel operates by summing the two differen-
tial inputs, one from the line (rxLINE) and the other from the
compromise hybrid (rxHYB). The connection of these two
inputs so that the hybrid signal is subtracted from the line
signal is described in the paragraph titled “Echo Cancella-
tion in the AFE”. The equivalent gain for each input in the
difference amp is 1. The resulting signal then passes to a
programmable gain amplifier which can be set for gains of
0dB through 9dB. The ADC converts the signal to a
14-bit digital word, rxD13 - rxD0.
rxLOOP INPUT
rxLOOP is the loopback control signal. When enabled, the
rxLINE
P
and rxLINE
N
inputs are disconnected from the
AFE. The rxHYB
P
and rxHYB
N
inputs remain connected.
Loopback is enabled by applying a positive signal (Logic 1)
to rxLOOP.
ECHO CANCELLATION IN THE AFE
The rxHYB input is designed to be subtracted from the
rxLINE input for first order echo cancellation. To accom-
plish this, note that the rxLINE input is connected to the
same polarity signal at the transformer (positive to positive
and negative to negative) while the rxHYB input is con-
nected to opposite polarity through the compromise hybrid
(negative to positive and positive to negative) as shown in
Figure 2.
RECEIVE DATA CODING
The data from the receive channel A/D converter is in two’s
complement code.
FIGURE 1. Functional Block Diagram of AFE1104.
ADC
Pulse Former
Programmable
Gain Amp
Difference
Amplifier
Differential
Line Driver
txLINE
P
txLINE
N
rxHYB
P
rxHYB
N
rxLINE
P
rxLINE
N
txDAT
rxD13 - rxD0
14
ANALOG INPUT
OUTPUT CODE (rxD13 - rxD0)
Positive Full Scale
Mid Scale
Negative Full Scale
01111111111111
00000000000000
10000000000000
RECEIVE CHANNEL PROGRAMMABLE
GAIN AMPLIFIER
The gain of the amplifier at the input of the Receive Channel
is set by two gain control pins, rxGAIN1 and rxGAIN0. The
resulting gain between 0dB and +9dB is shown below.
rxGAIN1
rxGAIN0
GAIN
0
0
0dB
0
1
3.25dB
1
0
6dB
1
1
9dB
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AFE1104E | HDSL/MDSL ANALOG FRONT END |
| AFE1105 | LJT 12C 8#20 4#16 SKT WALL REC |
| AFE1105E | Circular Connector; No. of Contacts:12; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-97 RoHS Compliant: No |
| AFE1115 | Circular Connector; No. of Contacts:12; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-97 RoHS Compliant: No |
| AFE1115E | Circular Connector; No. of Contacts:12; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-97 RoHS Compliant: No |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AFE1104E | 功能描述:電信線路管理 IC HDSL/MDSL Analog Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1104E/1K | 功能描述:電信線路管理 IC HDSL/MDSL Analog Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1104E/1KG4 | 功能描述:電信線路管理 IC HDSL/MDSL Analog Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1104EG4 | 功能描述:電信線路管理 IC HDSL/MDSL Analog Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1105 | 制造商:BB 制造商全稱:BB 功能描述:HDSL/MDSL ANALOG FRONT END |
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