參數(shù)資料
型號(hào)： AFE031AIRGZT
廠商： Texas Instruments
文件頁(yè)數(shù)： 30/57頁(yè)
文件大小： 0K
描述： IC AFE POWERLINE COMM 48VQFN
特色產(chǎn)品： An Intelligent Solar Micro-Inverter Solution
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 10
通道數(shù)： 1
電壓 - 電源，模擬： 3 V ~ 3.6 V
電壓 - 電源，數(shù)字： 3 V ~ 3.6 V
封裝/外殼： 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-VQFN 裸露焊盤（7x7）
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： 296-29692-6
SBOS531D – AUGUST 2010 – REVISED MAY 2012
Table 10. Gain Select Register: Address 0x02
Default: 0x32
Gain Select Register <7:0>
LOCATION
BIT NAME
(0 = LSB)
DEFAULT
R/W
FUNCTION
This bit is used to set the gain of the Rx PGA1.
00 = 0.25 V/V
RX1G-0,
0, 1
R/W
01 = 0.5 V/V
RX1G-1
10 = 1 V/V
11 = 2 V/V
This bit is used to set the gain of the Rx PGA2.
00 = 1 V/V
RX2G-0,
2, 3
0, 0
R/W
01 = 4 V/V
RX2G-1
10 = 16 V/V
11 = 64 V/V
This bit is used to set the gain of the Tx PGA.
00 = 0.25 V/V
TXG-0,
4, 5
1, 1
R/W
01 = 0.5 V/V
TXG-1
10 = 0.707 V/V
11 = 1 V/V
--
6
0
--
Reserved
--
7
0
--
Reserved
Table 11. Enable2 Register: Address 0x03
Default: 0x00
Enable2 Register <7:0>
LOCATION
BIT NAME
(0 = LSB)
DEFAULT
R/W
FUNCTION
This bit is used to enable/disable the ZC Block.
ZC
0
R/W
0 = disabled, 1 = enabled.
This bit is used to enable/disable the REF1 Block.
REF1
1
0
R/W
0 = disabled, 1 = enabled.
This bit is used to enable/disable the REF2 Block.
REF2
2
0
R/W
0 = disabled, 1 = enabled.
This bit is used to enable/disable the PA output stage.
When the PA output stage is enabled it functions normally with a
low output impedance, capable of driving heavy loads.
PA_OUT
3
0
R/W
When the PA output stage is disabled it is placed into a high
impedance state.
0 = disabled, 1 = enabled.
--
4
0
--
Reserved
--
5
0
--
Reserved
--
6
0
--
Reserved
--
7
0
--
Reserved
36
Copyright 2010–2012, Texas Instruments Incorporated
Product Folder Link(s): AFE031
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