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| 型號： | ADV7393BCPZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| 中文描述： | COLOR SIGNAL ENCODER, QCC40 |
| 封裝： | 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFSCP-40 |
| 文件頁數(shù)： | 30/96頁 |
| 文件大?。?/td> | 1209K |
| 代理商： | ADV7393BCPZ-REEL |
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ADV7390/ADV7391/ADV7392/ADV7393
Table 18. Register 0x34 to Register 0x38
SR7 to
SR0
Register
0x34
ED/HD Mode
Register 5
Rev. 0 | Page 30 of 96
Bit Description
ED/HD Timing Reset.
Bit Number
5
4
0
1
0
Register Setting
Internal ED/HD timing counters enabled
Resets the internal ED/HD timing counters
HSYNC output control (refer to
Table 50
)
Reset
Value
0x48
7
6
3
1
2
0
1
1
0
1
0
0
1
ED/HD HSYNC Control.
1
ED/HD VSYNC Control.
1
VSYNC output control (refer to
Table 51
)
Reserved.
ED Macrovision Enable.
2
ED Macrovision disabled
ED Macrovision enabled
0 must be written to this bit
Reserved.
0
1
0
1
x
x
x
0
1
0
1
x
x
x
0
1
x
x
x
0
1
x
x
x
0
1
x
x
x
0
1
x
x
x
0
x
x
x
0
x
x
x
0 = Field input
1 = VSYNC input
Update field/line counter
Field/line counter free running
Disabled
Enabled
DAC 2 = Pb, DAC 3 = Pr
DAC 2 = Pr, DAC 3 = Pb
Gamma Correction Curve A
Gamma Correction Curve B
Disabled
Enabled
Mode A
Mode B
Disabled
Enabled
Y level value
Cr level value
Cb level value
ED/HD VSYNC Input/Field
Input.
ED/HD Horizontal/Vertical
Counter Mode.
3
Reserved.
Reserved.
ED/HD Sync on PrPb.
0x00
ED/HD Color DAC Swap.
ED/HD Gamma Correction
Curve Select.
ED/HD Gamma
Correction Enable.
ED/HD Adaptive
Filter Mode.
0x35
ED/HD Mode
Register 6
ED/HD Adaptive
Filter Enable.
0x36
0x37
0x38
1
Used in conjunction with ED/HD sync output enable in Subaddress 0x02, Bit 7 = 1.
2
Applies to the ADV7390 and ADV7392 only.
3
When set to 0, the horizontal/vertical counters automatically wrap around at the end of the line/field/frame of the selected standard. When set to 1, the
horizontal/vertical counters are free running and wrap around when external sync signals indicate to do so.
4
For use with ED/HD internal test patterns only (Subaddress 0x31, Bit 2 = 1).
ED/HD Y Level
4
ED/HD Cr Level
4
ED/HD Cb Level
4
ED/HD Test Pattern Y Level.
ED/HD Test Pattern Cr Level.
ED/HD Test Pattern Cb Level.
0xA0
0x80
0x80
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7393-DBRDZ | 功能描述:BOARD EVAL FOR ADV7393 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:Advantiv® 標準包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| ADV7393EBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7393WBCPZ | 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Trays |
| ADV7393WBCPZ-REEL | 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Tape and Reel |
| ADV73946603 | 制造商:LG Corporation 功能描述:Frame Assembly |
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