參數(shù)資料
型號: ADV7183BBSTZ
廠商: ANALOG DEVICES INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Multiformat SDTV Video Decoder
中文描述: COLOR SIGNAL DECODER, PQFP80
封裝: LEAD FREE, MS-026-BEC, LQFP-80
文件頁數(shù): 61/100頁
文件大小: 844K
代理商: ADV7183BBSTZ
ADV7183B
REGISTER ACCESSES
The MPU can write to or read from most of the ADV7183B’s
registers, except the registers that are read only or write only.
The subaddress register determines which register the next read
or write operation accesses. All communications with the part
through the bus start with an access to the subaddress register.
Next, a read/write operation is performed from/to the target
address, which then increments to the next address until a stop
command on the bus is performed.
Rev. B | Page 61 of 100
REGISTER PROGRAMMING
This section describes the configuration of each register. The
communications register is an 8-bit, write only register. After
the part has been accessed over the bus and a read/write
operation is selected, the subaddress is set up. The subaddress
register determines to/from which register the operation takes
place.
263H
Table 82 lists the various operations under the control of
the subaddress register for the control port.
Register Select (SR7 to SR0)
These bits are set up to point to the required starting address.
I
2
C SEQUENCER
An I
2
C sequencer is used when a parameter exceeds eight bits
and is, therefore, distributed over two or more I
2
C registers,
such as HSB[11:0].
When such a parameter is changed using two or more I
2
C write
operations, the parameter can hold an invalid value for the time
between the first I
2
C completion and the last I
2
C completion.
This means, the top bits of the parameter can already hold the
new value while the remaining bits of the parameter still hold
the previous value.
To avoid this problem, the I
2
C sequencer holds the already
updated bits of the parameter in local memory; all bits of the
parameter are updated together once the last register write
operation has completed.
The correct operation of the I
2
C sequencer relies on the
following:
All I
2
C registers for the target parameter must be written to
in order of ascending addresses. For example, for
HSB[10:0], write to Address 0x34 first, followed by 0x35.
No other I
2
C can take place between the two (or more) I
2
C
writes for the sequence. For example, for HSB[10:0], write
to Address 0x34 first, immediately followed by 0x35.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7183BKST 制造商:Analog Devices 功能描述:MULTIFORMAT SDTV VID DECODER 80LQFP - Bulk
ADV7183BKSTZ 功能描述:IC VIDEO DECODER NTSC 80-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器,解碼器,轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源,模擬:- 電壓 - 電源,數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7183KST 制造商:Analog Devices 功能描述:Video Decoder 2ADC 10-Bit 80-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:VIDEO DECODER I.C. - Bulk
ADV7184 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder with Fast Switch Overlay Support
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