參數(shù)資料
型號(hào)： ADV7170
廠商： Analog Devices, Inc.
英文描述： Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management
中文描述： 數(shù)碼PAL / NTSC視頻編碼器與10位SSAF⑩和高級(jí)電源管理
文件頁數(shù)： 24/55頁
文件大?。?/td> 754K
代理商： ADV7170
ADV7170/ADV7171
–24–
REV. 0
MODE REGISTER 1 MR1 (MR17–MR10)
(Address (SR4–SR0) = 01H)
Figure 39 shows the various operations under the control of Mode
Register 1. This register can be read from as well as written to.
MR1 BIT DESCRIPTION
Interlaced Mode Control (MR10)
This bit is used to set up the output to interlaced or noninter-
laced mode. This mode is only relevant when the part is in
composite video mode.
Closed Captioning Field Control (MR12–MR11)
These bits control the fields on which closed captioning data is
displayed; closed captioning information can be displayed on an
odd field, even field or both fields.
DAC Control (MR16–MR13)
These bits can be used to power down the DACs. This can
be used to reduce the power consumption of the ADV7170/
ADV7171 if any of the DACs are not required in the application.
Color Bar Control (MR17)
This bit can be used to generate and output an internal color
bar test pattern. The color bar configuration is 75/7.5/75/7.5
for NTSC and 100/0/75/0 for PAL. It is important to note that
when color bars are enabled the ADV7170/ADV7171 is config-
ured in a master timing mode.
MODE REGISTER 2 MR2 (MR27–MR20)
(Address [SR4-SR0] = 02H)
Mode Register 2 is an 8-bit-wide register.
Figure 40 shows the various operations under the control of Mode
Register 2. This register can be read from as well as written to.
MR2 BIT DESCRIPTION
Square Pixel Mode Control (MR20)
This bit is used to set up square pixel mode. This is available in
slave mode only. For NTSC, a 24.54 MHz clock must be sup-
plied. For PAL, a 29.5 MHz clock must be supplied.
MR11
MR10
MR17
MR12
MR13
MR15
MR16
MR14
CLOSED CAPTIONING
FIELD SELECTION
MR12 MR11
0
0
1
1
0
1
0
1
NO DATA OUT
ODD FIELD ONLY
EVEN FIELD ONLY
DATA OUT
(BOTH FIELDS)
DAC A
CONTROL
0
1
NORMAL
POWER-DOWN
MR16
DAC D
CONTROL
MR14
0
1
DAC C
CONTROL
MR13
0
1
DAC B
CONTROL
MR15
0
1
INTERLACE
CONTROL
0
1
INTERLACED
NONINTERLACED
MR10
COLOR BAR
CONTROL
0
1
DISABLE
ENABLE
MR17
NORMAL
POWER-DOWN
NORMAL
POWER-DOWN
NORMAL
POWER-DOWN
Figure 39. Mode Register 1
MR21
MR27
MR22
MR23
MR26
MR25
MR24
MR20
CHROMINANCE
CONTROL
MR24
0
1
ENABLE COLOR
DISABLE COLOR
GENLOCK SELECTION
x
0
0
1
DISABLE GENLOCK
ENABLE SUBCARRIER
RESET PIN
ENABLE RTC PIN
1
1
MR22 MR21
LOW POWER MODE
SELECT
MR26
0
1
DISABLE
ENABLE
SQUARE PIXEL
CONTROL
MR20
0
1
DISABLE
ENABLE
BURST
CONTROL
0
1
ENABLE BURST
DISABLE BURST
MR25
MR27
ACTIVE VIDEO LINE WIDTH
CONTROL
MR23
0
1
CCI R624 OUTPUT
CCI R601 OUTPUT
RESERVED
Figure 40. Mode Register 2
MR31
MR30
MR37
MR32
MR34
MR33
MR35
MR36
MR30
MR31
RESERVED
VBI_OPEN
MR32
0
1
DISABLE
ENABLE
DAC OUTPUT
SWITCHING
0
1
COMPOSITE
GREEN/LUMA/Y
MR33
DAC A
BLUE/COMP/U
BLUE/COMP/U
DAC B
RED/CHROMA/V
RED/CHROMA/V
DAC C
GREEN/LUMA/Y
COMPOSITE
DAC D
CHROMA OUTPUT
SELECT
MR34
0
1
DISABLE
ENABLE
TELETEXT
CONTROL
MR35
0
1
DISABLE
ENABLE
TTX BIT REQUEST
MODE CONTROL
MR36
0
1
NORMAL
BIT REQUEST
ALL ZEROS INVALID
CONTROL
MR37
0 DISABLE
1 ENABLE
Figure 41. Mode Register 3
相關(guān)PDF資料
PDF描述
ADV7170KS Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management
ADV7170SU Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management
ADV7171KS Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management
ADV7171SU Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management
ADV7171* Digital PAL/NTSC Video Encoder with 10-Bit SSAF and Advanced Power Management
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV71707911 制造商:LG Corporation 功能描述:FRAME ASSEMBLY
ADV7170KS 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management
ADV7170KSUZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder
ADV7170KSUZ-REEL 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder
ADV7170KSZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder
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