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| 型號： | ADV7127KR140 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | CMOS, 240 MHz 10-Bit High Speed Video DAC |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 7/16頁 |
| 文件大小： | 307K |
| 代理商： | ADV7127KR140 |
ADV7127
–7–
REV. 0
3.3 V TIMING SPECIFICATIONS
1
Parameter
Min
Typ
Max
Units
Condition
ANALOG OUTPUTS
Analog Output Delay, t
6
Analog Output Rise/Fall Time, t
74
Analog Output Transition Time, t
85
Analog Output Skew, t
96
7.5
1.0
15
1
ns
ns
ns
ns
2
CLOCK CONTROL
f
CLK7
f
CLK7
f
CLK7
Data and Control Setup, t
26
Data and Control Hold, t
26
Clock Pulsewidth High, t
4
Clock Pulsewidth Low t
56
Clock Pulsewidth High t
46
Clock Pulsewidth Low t
56
Clock Pulsewidth High t
46
Clock Pulsewidth Low t
56
Pipeline Delay, t
PD6
PSAVE Up Time, t
106
PDOWN Up Time, t
118
50
140
240
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Clock Cycles
ns
ns
50 MHz Grade
140 MHz Grade
240 MHz Grade
1.5
2.5
1.1
1.4
f
MAX
= 240 MHz
f
MAX
= 240 MHz
f
MAX
= 140 MHz
f
MAX
= 140 MHz
f
MAX
= 50 MHz
f
MAX
= 50 MHz
2.85
2.85
8.0
8.0
1.0
1.0
4
320
1.0
10
NOTES
1
Timing specifications are measured with input levels of 3.0 V (V
) and 0 V (V
IL
) 0 for both 5 V and 3.3 V supplies.
2
These maximum and minimum specifications are guaranteed over this range.
3
Temperature range: T
to T
: –40
°
C to +85
°
C at 50 MHz and 140 MHz, 0
°
C to +70
°
C at 240 MHz.
4
Rise time was measured from the 10% to 90% point of zero to full-scale transition, fall time from the 90% to 10% point of a full-scale transition.
5
Measured from 50% point of full-scale transition to 2% of final value.
6
Guaranteed by characterization.
7
f
max specification production tested at 125 MHz and 5 V limits specified here are guaranteed by characterization.
8
This power-down feature is only available on the ADV7127 in the TSSOP package.
Specifications subject to change without notice.
CLOCK
DATA
t
4
t
5
t
7
t
8
NOTES:
1. OUTPUT DELAY (
t
6
) MEASURED FROM THE 50% POINT OF THE RISING
EDGE OF CLOCK TO THE 50% POINT OF FULL SCALE TRANSITION.
2. OUTPUT RISE/FALL TIME (
t
7
) MEASURED BETWEEN THE 10% AND
90% POINTS OF FULL SCALE TRANSITION.
3. TRANSITION TIME (
t
8
) MEASURED FROM THE 50% POINT OF FULL
SCALE TRANSITION TO WITHIN 2% OF THE FINAL OUTPUT VALUE.
t
2
ANALOG OUTPUTS
(I
OUT
,
)
DIGITAL INPUTS
(D9–D0)
t
3
t
1
t
6
I
OUT
Figure 1. Timing Diagram
(V
AA
= +3.0 V–3.6 V
2
, V
REF
= 1.235 V, R
SET
= 560
V
. All specifications T
MIN
to T
MAX3
unless
otherwise noted, T
J
MAX
= 110
8
C)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ADV7127KR140-REEL | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 10-bit 28-Pin SOIC W T/R 制造商:Rochester Electronics LLC 功能描述:SINGLE HIGH SPEED VIDEO DAC I.C. - Tape and Reel |
| ADV7127KR50 | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 10-bit 28-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:SINGLE HIGH SPEED VIDEO DAC I.C. - Bulk |
| ADV7127KR50-REEL | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 10-bit 28-Pin SOIC W T/R 制造商:Rochester Electronics LLC 功能描述:SINGLE HIGH SPEED VIDEO DAC I.C. - Tape and Reel |
| ADV7127KRU140 | 功能描述:IC DAC VID 140MHZ 3.3/5V 24TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| ADV7127KRU50 | 功能描述:IC DAC VIDEO SGL HI SPD 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
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