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參數(shù)資料
| 型號： | ADV3205JSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CROSSPOINT SWIT 16X16 100LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 交叉點(diǎn)開關(guān) |
| 電路： | 1 x 16:16 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 5.5 V，±5.5 V |
| 電流 - 電源： | 45mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
ADV3205
Data Sheet
Rev. 0 | Page 16 of 20
POWER-ON RESET
When powering up the ADV3205, it is usually desirable to have
the outputs start up in the disabled state. The RESET pin, when
taken low, causes all outputs to be in the disabled state. However,
the RESET signal does not reset all registers in the
This is important when operating in parallel programming mode.
Refer to the
section for information
about programming internal registers after power-up. Serial
programming programs the entire matrix each time; therefore,
no special considerations apply.
Because the data in the shift register is random after power-up,
do not use it to program the matrix or the matrix can enter
unknown states. To prevent this, do not apply logic low signals
to both CE and UPDATE initially after power-up. First, load the
shift register with the desired data, and then take UPDATE low
to program the device.
The RESET pin has a 20 kΩ pull-up resistor to DVCC that can be
used to create a simple power-up reset circuit. A capacitor from
RESET to ground holds RESET low for some time while the rest
of the device stabilizes. The low condition causes all outputs to
be disabled. The capacitor then charges through the pull-up resistor
to the high state, thus allowing full programming capability of
the device.
MANAGING VIDEO SIGNALS
Video signals often use controlled impedance transmission lines
that are terminated in their characteristic impedance. Although this
is not always the case, there are some considerations when using
the ADV3205 to route video signals with controlled impedance
transmission lines. Figure 29 shows a schematic of an input
and output treatment of a typical video channel.
75
TRANSMISSION
LINE
TYPICAL
OUTPUT
+5V
ADV3205
G = 2
–5V
TYPICAL
INPUT
75
VIDEO
SOURCE
10
34
2-
0
31
Figure 29. Video Signal Circuit
Video signals most often use 75 Ω transmission lines that need
to be terminated with this value of resistance at each end. When
such a source is delivered to one of the ADV3205 inputs, the
high input impedance does not properly terminate these signals.
Therefore, terminate the line with a 75 Ω shunt resistor to
ground. Because video signals are limited in their peak-to-peak
amplitude (typically no more than 1.5 V p-p), there is no need
to attenuate video signals before they pass through the ADV3205.
The ADV3205 outputs are low impedance and do not properly
terminate the source end of a 75 Ω transmission line. In these
cases, insert a series 75 Ω resistor at an output that drives a video
signal. Then terminate the 75 Ω transmission line with 75 Ω at
its far end. This overall termination scheme divides the amplitude
of the ADV3205 output by two. An overall unity-gain channel is
produced because of the channel gain-of-two of the ADV3205.
CREATING LARGER CROSSPOINT ARRAYS
The ADV3205 is a high density building block for creating
crosspoint arrays of dimensions larger than 16 × 16. Various
features, such as output disable and chip enable, are useful for
creating larger arrays.
The first consideration in constructing a larger crosspoint is to
determine the minimum number of devices that are required. The
16 × 16 architecture of the ADV3205 contains 256 points, which is
a factor of 64 greater than a 4 × 1 crosspoint (or multiplexer). The
printed circuit board (PCB) area, power consumption, and design
effort savings are readily apparent when compared to using
these smaller devices.
For a nonblocking crosspoint, the number of points required is
the product of the number of inputs multiplied by the number
of outputs. Nonblocking requires that the programming of a
given input to one or more outputs does not restrict the
availability of that input to be a source for any other outputs.
Some nonblocking crosspoint architectures require more than this
minimum as previously calculated. In addition, there are blocking
architectures that can be constructed with fewer devices than this
minimum. These systems have connectivity available on a statistical
basis that is determined when designing the overall system.
The basic concept in constructing larger crosspoint arrays is to
connect inputs in parallel in a horizontal direction and to wire-OR
the outputs together in the vertical direction. The meaning of
horizontal and vertical can best be understood by looking at a
diagram. Figure 30 illustrates this concept for a 32 × 32 crosspoint
array that uses four ADV3205 devices. Note that the 75 Ω source
terminations are not shown on the outputs, but they are required
when driving the 75 Ω transmission lines.
ADV3205
IN00 TO IN15
IN16 TO IN31
ADV3205
16
75
16
8
16
10
34
2
-03
2
Figure 30. 32 × 32 Crosspoint Array Using Four ADV3205 Devices
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