參數資料
型號： ADUM3201CRZ
廠商： ANALOG DEVICES INC
元件分類： 模擬信號調理
英文描述： Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability
中文描述： SPECIALTY ANALOG CIRCUIT, PDSO8
封裝： ROHS COMPLIANT, MS-012AA, SOIC-8
文件頁數： 12/20頁
文件大?。?/td> 222K
代理商： ADUM3201CRZ
ADuM3200/ADuM3201
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Table 9.
Parameter
Storage Temperature
Ambient Operating Temperature
Supply Voltages
1
Input Voltage
1, 2
Output Voltage
1, 2
Average Output Current, per Pin
3
Common-Mode Transients
4
1
All voltages are relative to their respective ground.
2
V
DDI
and V
DDO
refer to the supply voltages on the input and output sides of a given channel, respectively.
3
See Figure 3 for maximum rated current values for various temperatures.
4
Refers to common-mode transients across the insulation barrier. Common-mode transients exceeding the Absolute Maximum Rating can cause latch-up or
permanent damage.
Rev. 0 | Page 12 of 20
Symbol
T
ST
T
A
V
DD1
, V
DD2
V
IA
, V
IB
V
OA
, V
OB
I
O
CM
H
, CM
L
Min
55
40
0.5
0.5
0.5
35
100
Max
+150
+105
+7.0
V
DDI
+ 0.5
V
DDO
+ 0.5
+35
+100
Unit
°C
°C
V
V
V
mA
kV/μs
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only;
Functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Table 10. ADuM3200 Truth Table (Positive Logic)
V
IA
Input
V
IB
Input
V
DD1
State
H
H
Powered
L
L
Powered
H
L
Powered
L
H
Powered
X
X
Unpowered
V
DD2
State
Powered
Powered
Powered
Powered
Powered
V
OA
Output
H
L
H
L
H
V
OB
Output
H
L
L
H
H
Notes
Outputs return to the input state within
1 μs of V
DDI
power restoration.
Outputs return to the input state within
1 μs of V
DDO
power restoration.
X
X
Powered
Unpowered
Indeterminate
Indeterminate
Table 11. ADuM3201 Truth Table (Positive Logic)
V
IA
Input
V
IB
Input
V
DD1
State
H
H
Powered
L
L
Powered
H
L
Powered
L
H
Powered
X
X
Unpowered
V
DD2
State
Powered
Powered
Powered
Powered
Powered
V
OA
Output
H
L
H
L
Indeterminate
V
OB
Output
H
L
L
H
H
Notes
Outputs return to the input state within
1 μs of V
DDI
power restoration.
Outputs return to the input state within
1 μs of V
DDO
power restoration.
X
X
Powered
Unpowered
H
Indeterminate
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