參數(shù)資料
型號: ADUM1412BRWZ-RL
廠商: ANALOG DEVICES INC
元件分類: 其它接口
英文描述: Quad-Channel Digital Isolators
中文描述: SPECIALTY INTERFACE CIRCUIT, PDSO16
封裝: ROHS COMPLIANT, MS-013AA, SOIC-16
文件頁數(shù): 19/20頁
文件大小: 277K
代理商: ADUM1412BRWZ-RL
ADuM1410/ADuM1411/ADuM1412
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse
(and was of the worst-case polarity), it reduces the received
pulse from >1.0 V to 0.75 V—still well above the 0.5 V sensing
threshold of the decoder.
Rev. E | Page 19 of 20
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances from the
ADuM141x transformers. Figure 19 expresses these allowable
current magnitudes as a function of frequency for selected
distances. As shown, the ADuM141x is extremely immune and
can be affected only by extremely large currents operated at
high frequency very close to the component. For the 1 MHz
example noted, a 0.5 kA current needed to be placed 5 mm
away from the ADuM141x to affect the operation of the
component.
MAGNETIC FIELD FREQUENCY (Hz)
M
1000
100
10
1
0.1
0.01
1k
10k
100M
100k
1M
10M
DISTANCE = 5mm
DISTANCE = 1m
DISTANCE = 100mm
0
Figure 19. Maximum Allowable Current for Various
Current-to-ADuM141x Spacings
Note that at combinations of strong magnetic field and high
frequency, any loops formed by printed circuit board traces
could induce error voltages sufficiently large enough to trigger
the thresholds of succeeding circuitry. Care should be taken in
the layout of such traces to avoid this possibility.
POWER CONSUMPTION
The supply current at a given channel of the ADuM141x
isolator is a function of the supply voltage, the data rate of the
channel, and the output load of the channel.
For each input channel, the supply current is given by
I
DDI
= I
DDI
(
Q
)
I
DDI
=
I
DDI (D)
× (2
f
f
r
) +
I
DDI
(
Q
)
f
≤ 0.5
f
r
f
> 0.5
f
r
For each output channel, the supply current is given by
I
DDO
= I
DDO
(
Q
)
I
DDO
= (
I
DDO
(
D
)
+ (0.5 × 10
3
) ×
C
L
× V
DDO
) × (2
f f
r
) +
I
DDO
(
Q
)
f
≤ 0.5
f
r
f
> 0.5
f
r
where:
I
DDI (D)
,
I
DDO (D)
are the input and output dynamic supply currents
per channel (mA/Mbps).
C
L
is the output load capacitance (pF).
V
DDO
is the output supply voltage (V).
f
is the input logic signal frequency (MHz); it is half of the input
data rate expressed in units of Mbps.
f
r
is the input stage refresh rate (Mbps).
I
DDI (Q)
,
I
DDO (Q)
are the specified input and output quiescent
supply currents (mA).
To calculate the total V
DD1
and V
DD2
supply current, the supply
currents for each input and output channel corresponding to
V
DD1
and V
DD2
are calculated and totaled. Figure 8 and Figure 9
provide per-channel supply currents as a function of data rate
for an unloaded output condition. Figure 10 provides per-
channel supply current as a function of data rate for a 15 pF
output condition. Figure 11 through Figure 15 provide total
V
DD1
and V
DD2
supply current as a function of data rate for
ADuM1410/ADuM1411/ADuM1412 channel configurations.
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