參數(shù)資料
型號: ADUM1300BRW
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調(diào)理
英文描述: Triple-Channel Digital Isolators
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO16
封裝: MS-013AA, SOIC-16
文件頁數(shù): 9/20頁
文件大?。?/td> 713K
代理商: ADUM1300BRW
ADuM1300/ADuM1301
Parameter
For All Models
Output Disable Propagation Delay
(High/Low-to-High Impedance)
Output Enable Propagation Delay
(High Impedance to High/Low)
Output Rise/Fall Time (10% to 90%)
5 V/3 V Operation
3 V/5 V Operation
Common-Mode Transient Immunity at
Logic High Output
8
Common-Mode Transient Immunity at
Logic Low Output
8
Refresh Rate
5 V/3 V Operation
3 V/5 V Operation
Input Dynamic Supply Current, per Channel
9
5 V/3 V Operation
3 V/5 V Operation
Output Dynamic Supply Current, per Channel
9
5 V/3 V Operation
3 V/5 V Operation
Rev. C | Page 9 of 20
Symbol
t
PHZ
, t
PLH
Min
Typ
6
Max Unit
8
Test Conditions
C
L
= 15 pF, CMOS signal levels
ns
t
PZH
, t
PZL
6
8
ns
C
L
= 15 pF, CMOS signal levels
t
R
/t
f
|CM
H
|
25
3.0
2.5
35
ns
ns
kV/μs
C
L
= 15 pF, CMOS signal levels
V
Ix
= V
DD1
/V
DD2
, V
CM
= 1000 V,
transient magnitude = 800 V
V
Ix
= 0 V, V
CM
= 1000 V,
transient magnitude = 800 V
mA/Mbps
mA/Mbps
mA/Mbps
mA/Mbps
|CM
L
|
25
35
kV/μs
f
r
I
DDI (D)
I
DDI (D)
1.2
1.1
0.19
0.10
0.03
0.05
Mbps
Mbps
1
All voltages are relative to their respective ground.
2
Supply current values for all three channels are combined when running at identical data rates. Output supply current values are specified with no output load present. The
supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section on Page 17. See Figure 6
through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 12 for total I
DD1
and I
DD2
supply currents as a function of data rate for ADuM1300/ADuM1301 channel configurations.
3
The minimum pulse width is the shortest pulse width at which the specified pulse-width distortion is guaranteed.
4
The maximum data rate is the fastest data rate at which the specified pulse-width distortion is guaranteed.
5
t
PHL
propagation delay is measured from the 50% level of the falling edge of the V
Ix
signal to the 50% level of the falling edge of the V
Ox
signal. t
PLH
propagation delay is measured
from the 50% level of the rising edge of the V
Ix
signal to the 50% level of the rising edge of the V
Ox
signal.
6
t
PSK
is the magnitude of the worst-case difference in t
PHL
or t
PLH
that is measured between units at the same operating temperature, supply voltages, and output load within the
recommended operating conditions.
7
Co-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation
barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing
sides of the isolation barrier.
8
CM
H
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD2
. CM
L
is the maximum common-mode voltage slew rate that can be
sustained while maintaining V
O
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the
range over which the common mode is slewed.
9
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 6 through
channel supply current for unloaded and loaded conditions. See the Power Consumption section on Page 17 for guidance on calculating the per-channel supply current for a
given data rate.
for information on per-
Figure 8
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