參數(shù)資料
型號(hào): ADUM1230BRWZ-RL
廠(chǎng)商: ANALOG DEVICES INC
元件分類(lèi): 其它接口
英文描述: Isolated Half-Bridge Driver, 0.1 A Amp Output
中文描述: SPECIALTY INTERFACE CIRCUIT, PDSO16
封裝: ROHS COMPLIANT, MS-013AA, SOIC-16
文件頁(yè)數(shù): 3/12頁(yè)
文件大?。?/td> 175K
代理商: ADUM1230BRWZ-RL
ADuM1230
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
All voltages are relative to their respective ground. 4.5 V ≤ V
DD1
≤ 5.5 V, 12 V ≤ V
DDA
≤ 18 V, 12 V ≤ V
DDB
≤ 18 V. All min/max
specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at T
A
= 25°C,
V
DD1
= 5 V, V
DDA
= 15 V, V
DDB
= 15 V.
Table 1.
Parameter
Symbol
DC SPECIFICATIONS
Input Supply Current, Quiescent
I
DDI (Q)
Output Supply Current, A or B, Quiescent
I
DDA (Q)
,
I
DDB (Q)
Input Supply Current, 10 Mbps
I
DDI (10)
Output Supply Current, A or B, 10 Mbps
I
DDA (10)
,
I
DDB (10)
Input Currents
I
IA
, I
IB
, I
DISABLE
Logic High Input Threshold
V
IH
Logic Low Input Threshold
V
IL
Logic High Output Voltages
V
OAH
, V
OBH
Rev. A | Page 3 of 12
Min
Typ
Max
4.0
1.2
Unit
mA
mA
Test Conditions
8.0
22
mA
mA
C
L
= 200 pF
10
2.0
V
DDA
0.1,
V
DDB
0.1
100
10
97
+0.01
V
DDA
, V
DDB
+10
0.8
μA
V
V
V
0 ≤ V
IA
, V
IB
, V
DISABLE
≤ V
DD1
I
OA
, I
OB
= 1 mA
Logic Low Output Voltages
Output Short-Circuit Pulsed Current
1
SWITCHING SPECIFICATIONS
Minimum Pulse Width
2
Maximum Switching Frequency
3
Propagation Delay
4
Change vs. Temperature
Pulse Width Distortion, |t
PLH
t
PHL
|
Channel-to-Channel Matching,
Rising or Falling Edges
5
Channel-to-Channel Matching,
Rising vs. Falling Edges
6
Part-to-Part Matching, Rising or Falling Edges
7
Part-to-Part Matching, Rising vs. Falling Edges
8
Output Rise/Fall Time (10% to 90%)
1
Short-circuit duration less than 1 second. Average power must conform to the limit shown under the Absolute Maximum Ratings.
2
The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed.
3
The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed.
4
t
PHL
propagation delay is measured from the 50% level of the falling edge of the V
Ix
signal to the 50% level of the falling edge of the V
Ox
signal. t
PLH
propagation delay is
measured from the 50% level of the rising edge of the V
Ix
signal to the 50% level of the rising edge of the V
Ox
signal.
5
Channel-to-channel matching, rising vs. falling edges is the magnitude of the propagation delay difference between two channels of the same part when the inputs
are either both rising edges or falling edges. The supply voltages and the loads on each channel are equal.
6
Channel-to-channel matching, rising or falling edges is the magnitude of the propagation delay difference between two channels of the same part when one input is
a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal.
7
Part-to-part matching, rising or falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs
are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
8
Part-to-part matching, rising vs. falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when one input
is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
V
OAL
, V
OBL
I
OA (SC)
, I
OB (SC)
PW
t
PHL
, t
PLH
PWD
124
100
0.1
100
160
8
5
V
mA
ns
Mbps
ns
ps/°C
ns
ns
I
OA
, I
OB
= 1 mA
C
L
= 200 pF
C
L
= 200 pF
C
L
= 200 pF
C
L
= 200 pF
C
L
= 200 pF
13
ns
C
L
= 200 pF
t
R
/t
F
55
63
20
ns
ns
ns
C
L
= 200 pF
C
L
= 200 pF
C
L
= 200 pF
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