參數(shù)資料
型號： ADUC831BSZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 54/76頁
文件大小： 0K
描述： IC MCU 62K FLASH ADC/DAC 52MQFP
標準包裝： 800
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 16MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設備： PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 34
程序存儲器容量： 62KB（62K x 8）
程序存儲器類型： 閃存
EEPROM 大小： 4K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 2x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 52-QFP
包裝： 帶卷 (TR)
配用： EVAL-ADUC831QSZ-ND - KIT DEV FOR ADUC831 QUICK START
REV. 0
–58–
ADuC831
Timer 3 Generated Baud Rates
The high integer dividers in a UART block mean that high speed
baud rates are not always possible using some particular crystals.
For example, using a 12 MHz crystal, a baud rate of 115200 is
not possible. To address this problem, the ADuC831 has added
a dedicated baud rate timer (Timer 3) specifically for generating
highly accurate baud rates.
Timer 3 can be used instead of Timer 1 or Timer 2 for generating
very accurate high speed UART baud rates including 115200
and 230400. Timer 3 also allows a much wider range of baud
rates to be obtained. In fact, every desired bit rate from 12 bit/s
to 393216 bit/s can be generated to within an error of
±0.8%.
Timer 3 also frees up the other three timers, allowing them to
be used for different applications. A block diagram of Timer 3 is
shown in Figure 54 below.
(1 + T3FD/64)
2
T3 RX/TX
CLOCK
CORE
CLK
T3EN
RX CLOCK
TX CLOCK
TIMER 1/TIMER 2
RX CLOCK (FIG 53)
FRACTIONAL
DIVIDER
0
1
TIMER 1/TIMER 2
TX CLOCK (FIG 53)
16
2DIV
Figure 54. Timer 3, UART Baud Rates
Two SFRs (T3CON and T3FD) are used to control Timer 3.
T3CON is the baud rate control SFR, allowing Timer 3 to be
used to set up the UART baud rate, and setting up the binary
divider (DIV).
Table XXVI. T3CON SFR Bit Designations
Bit
Name
Description
7
T3BAUDEN
T3UARTBAUD Enable
Set to enable Timer 3 to generate
the baud rate. When set, PCON.7,
T2CON.4 and T2CON.5 are ignored.
Cleared to let the baud rate be
generated as per a standard 8052.
6
–
5
–
4
–
3
–
2
DIV2
Binary Divider Factor.
1
DIV1
DIV2 DIV1 DIV0 Bin Divider
0
DIV0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
The appropriate value to write to the DIV2-1-0 bits can be calcu-
lated using the following formula where fCORE is the crystal
frequency:
Note: The DIV value must be rounded down.
DIV
f
32
Baud Rate
CORE
=
×
log
log( )
2
T3FD is the fractional divider ratio required to achieve the
required baud rate. We can calculate the appropriate value for
T3FD using the following formula.
Note: T3FD should be rounded to the nearest integer.
TFD
f
Baud Rate
CORE
DIV
3
2
=
×
Once the values for DIV and T3FD are calculated the actual
baud rate can be calculated using the following formula.
Actual Baud Rate =
2f
2
(T3FD+ 64)
CORE
DIV
×
For example, to get a baud rate of 115200 while operating at
11.0592 MHz:
DIV
LOG
TFD
H
=×
()
==
=×
()
×
() ==
11059200
32 115200
2
1 58
1
32 11059200
2
115200
64
32
20
1
//
.
/–
Therefore, the actual baud rate is 115200 bit/s.
Table XXVII. Commonly Used Baud Rates Using Timer 3
Ideal
%
Baud
Crystal
DIV
T3CON
T3FD
Error
230400
11.0592
0
80H
20H
0.0
115200
11.0592
1
81H
20H
0.0
57600
11.0592
2
82H
20H
0.0
38400
11.0592
3
83H
08H
0.0
19200
11.0592
4
84H
08H
0.0
9600
11.0592
5
85H
08H
0.0
230400
12
0
80H
28H
0.16
115200
12
1
81H
28H
0.16
57600
12
2
82H
28H
0.16
38400
12
3
83H
0EH
0.16
19200
12
4
84H
0EH
0.16
9600
12
5
85H
0EH
0.16
230400
14
0
80H
3AH
0.39
115200
14
1
81H
3AH
0.39
57600
14
2
82H
3AH
0.39
38400
14
3
83H
1BH
0.16
19200
14
4
84H
1BH
0.16
9600
14
5
85H
1BH
0.16
230400
16
1
81H
05H
0.64
115200
16
2
82H
05H
0.64
57600
16
3
83H
05H
0.64
38400
16
3
83H
28H
0.16
19200
16
4
84H
28H
0.16
9600
16
5
85H
28H
0.16
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