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參數(shù)資料
| 型號(hào)： | ADUC702X |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 32位微控制器 |
| 英文描述： | Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU |
| 中文描述： | 精密模擬微控制器的12位模擬I / O，ARM7TDMI的微控制器 |
| 文件頁數(shù)： | 53/80頁 |
| 文件大?。?/td> | 840K |
| 代理商： | ADUC702X |
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Preliminary Technical Data
ADuC702x Series
Rev. PrB | Page 53 of 80
2
18
16
2
9600
088
.
3
45
×
2048
×
×
×
=
+
MHz
N
M
019
.
2048
=
+
N
M
M = 1 and N = 0.019 x 2048 = 39
)
2048
39
1
2
18
16
2
088
.
45
3
+
×
×
×
×
=
MHz
Baudrate
Baudrate = 9602 bps
Error = 0.02% compared to 1.92% with the normal baudrate
generator.
UART registers definition
The UART interface consists on 12 registers namely:
-
COMTX:
8-bit transmit register
-
COMRX:
8-bit receive register
-
COMDIV0:
divisor latch (low byte)
COMTX, COMRX and COMDIV0 share the same address
location. COMTX and COMTX can be accessed when bit 7
in COMCON0 register is cleared. COMDIV0 can be accessed
when bit 7 of COMCON0 is set.
-
COMDIV1:
divisor latch (high byte)
-
COMCON0:
line control register
-
COMSTA0:
line status register
-
COMIEN0:
interrupt enable register
-
COMIID0:
interrupt identification register
-
COMCON1:
modem control register
-
COMSTA1:
modem status register
-
COMDIV2:
16-bit fractional baud divide register
-
COMSCR:
8-bit scratch register used for temporary storage.
Also used in network addressable UART mode.
Table 37: COMCON0 MMR Bit Descriptions
Bit
7
Name
DLAB
Description
Divisor latch access
Set by user to enable access to COMDIV0 and COMDIV1 registers
Cleared by user to disable access to COMDIV0 and COMDIV1 and enable access to COMRX and
COMTX
Set break.
Set by user to force SOUT to 0
Cleared to operate in normal mode
Stick parity
Set by user to force parity to defined values:
1 if EPS = 1 and PEN = 1
0 if EPS = 0 and PEN = 1
Even parity select bit
Set for even parity
Cleared for odd parity
Parity enable bit:
Set by user to transmit and check the parity bit
Cleared by user for no parity transmission or checking
Stop bit
Set by user to transmit 1.5 Stop bit if the Word Length is 5 bits or 2 Stop bits if the word length is 6, 7
or 8 bits. The receiver checks the first Stop bit only, regardless of the number of Stop bits selected
Cleared by user to generate 1 Stop bit in the transmitted data
Word length select:
00 = 5 bits
01 = 6 bits
10 = 7 bits
11 = 8 bits
6
BRK
5
SP
4
EPS
3
PEN
2
STOP
1-0
WLS
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